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179 |
syang |
/*
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3742 |
dreachem |
* Copyright (C) 2008-2011 Advanced Micro Devices, Inc. All Rights Reserved.
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749 |
hucheng |
*/
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179 |
syang |
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749 |
hucheng |
/*
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3577 |
leihuang |
* Copyright (C) 2007. Pathscale LLC. All Rights Reserved.
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*/
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/*
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* Copyright (C) 2006, 2007. QLogic Corporation. All Rights Reserved.
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*/
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/*
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749 |
hucheng |
* Copyright 2002, 2003, 2004, 2005, 2006 PathScale, Inc. All Rights Reserved.
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*/
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179 |
syang |
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749 |
hucheng |
/*
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Copyright (C) 2000, 2001 Silicon Graphics, Inc. All Rights Reserved.
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179 |
syang |
This program is free software; you can redistribute it and/or modify it
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under the terms of version 2 of the GNU General Public License as
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published by the Free Software Foundation.
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This program is distributed in the hope that it would be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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Further, this software is distributed without any warranty that it is
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free of the rightful claim of any third person regarding infringement
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or the like. Any license provided herein, whether implied or
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otherwise, applies only to this software file. Patent licenses, if
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any, provided herein do not apply to combinations of this program with
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other software, or any other product whatsoever.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write the Free Software Foundation, Inc., 59
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Temple Place - Suite 330, Boston MA 02111-1307, USA.
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Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pky,
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Mountain View, CA 94043, or:
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http://www.sgi.com
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For further information regarding this notice, see:
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http://oss.sgi.com/projects/GenInfo/NoticeExplan
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*/
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/* ====================================================================
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* ====================================================================
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*
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* Module: cgdriver.c
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* $Source: /proj/osprey/CVS/open64/osprey1.0/be/cg/cgdriver.cxx,v $
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*
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* Description:
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*
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* Main driver -- command line processing and file name manipulation --
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* for the code generator.
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*
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* ====================================================================
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* ====================================================================
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*/
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749 |
hucheng |
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179 |
syang |
#include <stdint.h>
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3577 |
leihuang |
#include <errno.h>
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179 |
syang |
#include <elf_stuff.h>
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3577 |
leihuang |
#if ! defined(BUILD_OS_DARWIN)
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#include <elf.h>
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#endif /* ! defined(BUILD_OS_DARWIN) */
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179 |
syang |
#include <sys/elf_whirl.h> /* for WHIRL_REVISION */
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#include <ctype.h>
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#include "defs.h"
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#include "config.h"
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#include "config_debug.h"
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#include "config_list.h"
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3577 |
leihuang |
#include "config_targ_opt.h"
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179 |
syang |
#include "config_opt.h"
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#include "cg_flags.h"
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#include "controls.h"
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#include "flags.h"
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#include "erglob.h"
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#include "erlib.h"
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#include "errors.h"
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3742 |
dreachem |
#include "../cg/init.cxx" /* force include of Cg_Initializer */
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3577 |
leihuang |
#include "ercg.h"
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179 |
syang |
#include "file_util.h"
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#include "glob.h"
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#include "timing.h"
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#include "tracing.h"
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#include "util.h"
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#include "mempool.h"
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#include "wn.h" /* for WN */
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#include "opt_alias_interface.h" /* for ALIAS_MANAGER stuff */
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#include "dwarf_DST_mem.h"
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#include "bb.h" /* for cgemit.h */
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#include "cg.h" /* CG_Initialize(), etc. */
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#include "cgemit.h" /* R_Assemble_File() */
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#include "cg_swp_options.h" /* for SWP_Options */
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#include "gra.h" /* for GRA_optimize_placement... */
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#include "ebo.h" /* for EBO options */
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#include "cgprep.h" /* for CGPREP knobs */
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#include "cg_dep_graph.h" /* for CG_DEP knobs */
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#include "cg_dep_graph_update.h" /* more CG_DEP knobs */
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#include "cio.h" /* for rw, cicse etc ...*/
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#include "cg_loop.h" /* for unrolling */
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#include "cg_loop_recur.h" /* recurrence fixing */
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#include "cgtarget.h" /* target-dependent stuff */
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#include "gcm.h" /* for GCM options */
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#include "cg_sched_est.h" /* for CG_SCHED_EST options */
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#include "targ_proc_properties.h"
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#include "cgdriver_arch.h"
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#include "cgdriver.h"
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#include "register.h"
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#include "pqs_cg.h"
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3577 |
leihuang |
#if defined(TARG_IA64) || defined(TARG_LOONGSON)
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179 |
syang |
#include "ipfec_options.h"
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749 |
hucheng |
#endif
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#ifdef KEY
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#include "cg_gcov.h"
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#include "flags.h"
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#endif
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3577 |
leihuang |
#include "cg_swp.h"
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3675 |
dreachem |
#ifdef TARG_X8664
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#include "config_wopt.h"
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#endif
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179 |
syang |
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extern void Set_File_In_Printsrc(char *); /* defined in printsrc.c */
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extern char *WHIRL_File_Name;
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/* ====================================================================
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*
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* Back end process-specific global data from glob.h.
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*
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* ====================================================================
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*/
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/* Output requested: */
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BOOL Assembly = FALSE; /* Assembly code */
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BOOL Object_Code = FALSE; /* Object code */
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/* Have the OP_REGCOPY operations been translated? */
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BOOL Regcopies_Translated = FALSE;
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/* ====================================================================
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*
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* Local data.
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*
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* ====================================================================
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*/
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static char *Argv0; /* argv[0] from main */
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/* Default file extensions: */
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#define ASM_FILE_EXTENSION ".s" /* Assembly code file */
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#define OBJ_FILE_EXTENSION ".o" /* Relocatable object file */
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#define DSTDUMP_FILE_EXTENSION ".be.dst" /* DST dump-file extension */
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/* Internal flags: */
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static BOOL cg_opt_level_overridden = FALSE;
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static BOOL CG_tail_call_overridden = FALSE;
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static BOOL CG_enable_prefetch_overridden = FALSE;
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static BOOL CG_enable_z_conf_prefetch_overridden = FALSE;
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static BOOL CG_enable_nz_conf_prefetch_overridden = FALSE;
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static BOOL CG_enable_pf_L1_ld_overridden = FALSE;
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static BOOL CG_enable_pf_L1_st_overridden = FALSE;
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static BOOL CG_enable_pf_L2_ld_overridden = FALSE;
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static BOOL CG_enable_pf_L2_st_overridden = FALSE;
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static BOOL CG_L1_ld_latency_overridden;
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| 177 |
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static BOOL CG_L2_ld_latency_overridden;
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| 178 |
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static BOOL CG_L1_pf_latency_overridden;
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| 179 |
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static BOOL CG_L2_pf_latency_overridden;
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static BOOL CG_maxinss_overridden = FALSE;
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static BOOL Enable_CG_Peephole_overridden = FALSE;
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| 182 |
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static BOOL EBO_Opt_Level_overridden = FALSE;
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| 183 |
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static BOOL Integer_Divide_By_Constant_overridden = FALSE;
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| 184 |
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static BOOL Integer_Divide_Use_Float_overridden = FALSE;
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| 185 |
749 |
hucheng |
#ifdef TARG_IA64
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| 186 |
179 |
syang |
static BOOL CGPREP_fold_expanded_daddiu_overridden = FALSE;
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static BOOL CG_LOOP_create_loop_prologs_overridden = FALSE;
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| 188 |
749 |
hucheng |
#endif
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3577 |
leihuang |
#ifdef KEY
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static BOOL Integer_Multiply_By_Constant_overridden = FALSE;
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#endif
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| 192 |
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static BOOL CG_DEP_Mem_Arc_Pruning_overridden = FALSE;
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179 |
syang |
static BOOL clone_incr_overridden = FALSE;
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static BOOL clone_min_incr_overridden = FALSE;
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| 195 |
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static BOOL clone_max_incr_overridden = FALSE;
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| 196 |
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static BOOL CFLOW_Enable_Clone_overridden = FALSE;
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| 197 |
749 |
hucheng |
#ifdef TARG_X8664
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| 198 |
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BOOL cg_load_execute_overridden = FALSE;
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| 199 |
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#endif
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| 200 |
3577 |
leihuang |
#ifdef TARG_NVISA
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| 201 |
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static BOOL CG_use_16bit_ops_overridden = FALSE;
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| 202 |
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static BOOL CG_rematerialize_grf_overridden= FALSE;
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| 203 |
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#endif
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| 204 |
179 |
syang |
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| 205 |
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/* Keep a copy of the command line options for assembly output: */
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static char *option_string;
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| 207 |
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| 208 |
749 |
hucheng |
#ifdef TARG_IA64
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| 209 |
179 |
syang |
extern BOOL SWP_KNOB_fatpoint;
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| 210 |
749 |
hucheng |
#endif
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| 211 |
179 |
syang |
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3577 |
leihuang |
#if !defined(TARG_NVISA)
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179 |
syang |
/* Software pipelining options: */
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static OPTION_DESC Options_CG_SWP[] = {
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| 216 |
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/* General software pipelining options */
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{ OVK_BOOL, OV_INTERNAL, TRUE, "", NULL,
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0, 0, 0, &Enable_SWP, &Enable_SWP_overridden },
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{ OVK_INT32, OV_INTERNAL, TRUE, "sched_direction", "sched_dir",
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0, 0, INT32_MAX, &SWP_Options.Sched_Direction, NULL },
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| 223 |
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{ OVK_INT32, OV_INTERNAL, TRUE, "heuristics", "heur",
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0, 0, INT32_MAX, &SWP_Options.Heuristics, NULL },
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| 225 |
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{ OVK_INT32, OV_INTERNAL, TRUE, "opt", "opt",
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| 226 |
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0, 0, INT32_MAX, &SWP_Options.Opt_Level, NULL },
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| 227 |
749 |
hucheng |
#ifdef TARG_IA64
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| 228 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "do_loop", NULL,
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| 229 |
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0, 0, 0, &SWP_Options.Enable_Do_Loop, NULL },
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| 230 |
749 |
hucheng |
#endif
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| 231 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "while_loop", NULL,
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| 232 |
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0, 0, 0, &SWP_Options.Enable_While_Loop, NULL },
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| 233 |
749 |
hucheng |
#ifdef TARG_IA64
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| 234 |
179 |
syang |
{ OVK_INT32, OV_INTERNAL, TRUE, "miss_ratio", "miss_r",
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| 235 |
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0, 0, INT32_MAX, &SWP_Options.Load_Cache_Miss_Ratio, NULL },
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| 236 |
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{ OVK_INT32, OV_INTERNAL, TRUE, "miss_latency", "miss_l",
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| 237 |
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0, 0, INT32_MAX, &SWP_Options.Load_Cache_Miss_Latency, NULL },
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| 238 |
749 |
hucheng |
#endif
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| 239 |
179 |
syang |
{ OVK_INT32, OV_INTERNAL, TRUE, "min_unroll_times", "min_unr",
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| 240 |
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0, 0, INT32_MAX, &SWP_Options.Min_Unroll_Times, &SWP_Options.Max_Unroll_Times_Set },
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| 241 |
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{ OVK_INT32, OV_INTERNAL, TRUE, "max_unroll_times", "max_unr",
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| 242 |
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0, 0, INT32_MAX, &SWP_Options.Max_Unroll_Times, &SWP_Options.Max_Unroll_Times_Set },
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| 243 |
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{ OVK_BOOL, OV_INTERNAL, TRUE, "bundle", NULL,
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| 244 |
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TRUE, 0, 0, &SWP_Options.Enable_Bundling, NULL },
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| 245 |
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{ OVK_BOOL, OV_INTERNAL, TRUE, "postincr", "posti",
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| 246 |
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0, 0, 0, &SWP_Options.Enable_Post_Incr, NULL },
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| 247 |
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{ OVK_INT32, OV_INTERNAL, TRUE, "start_ii", "start",
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| 248 |
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0, 0, INT32_MAX, &SWP_Options.Starting_II, NULL },
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| 249 |
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{ OVK_BOOL, OV_INTERNAL, TRUE, "workaround", "work",
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| 250 |
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0, 0, 0, &SWP_Options.Enable_Workaround, NULL },
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| 251 |
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{ OVK_INT32, OV_INTERNAL, TRUE, "critical_threshold", "critical",
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| 252 |
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0, 0, INT32_MAX, &SWP_Options.Critical_Threshold, NULL },
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| 253 |
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{ OVK_BOOL, OV_INTERNAL, TRUE, "prep_only", "",
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| 254 |
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0, 0, 0, &SWP_Options.Prep_Only, NULL },
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| 255 |
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{ OVK_BOOL, OV_INTERNAL, TRUE, "min_retry", "",
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| 256 |
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0, 0, 0, &SWP_Options.Min_Retry, NULL },
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| 257 |
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{ OVK_BOOL, OV_INTERNAL, TRUE, "implicit_prefetch", "",
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| 258 |
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0, 0, 0, &SWP_Options.Implicit_Prefetch, &SWP_Options.Implicit_Prefetch_Set },
|
| 259 |
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{ OVK_BOOL, OV_INTERNAL, TRUE, "predicate_promotion", "",
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| 260 |
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0, 0, 0, &SWP_Options.Predicate_Promotion, NULL },
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| 261 |
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{ OVK_BOOL, OV_INTERNAL, TRUE, "enable_brp", "",
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| 262 |
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0, 0, 0, &SWP_Options.Enable_BRP, NULL },
|
| 263 |
749 |
hucheng |
#ifdef TARG_IA64
|
| 264 |
179 |
syang |
{ OVK_INT32, OV_INTERNAL, TRUE, "fb_prob1", "",
|
| 265 |
|
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0, 0, INT32_MAX, &SWP_Options.FB_Prob1, NULL },
|
| 266 |
|
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{ OVK_INT32, OV_INTERNAL, TRUE, "fb_prob2", "",
|
| 267 |
|
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0, 0, INT32_MAX, &SWP_Options.FB_Prob2, NULL },
|
| 268 |
|
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{ OVK_INT32, OV_INTERNAL, TRUE, "fb_freq", "",
|
| 269 |
|
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0, 0, INT32_MAX, &SWP_Options.FB_Freq, NULL },
|
| 270 |
3577 |
leihuang |
#endif
|
| 271 |
|
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#ifdef SWP_USE_STL
|
| 272 |
|
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{ OVK_INT32, OV_INTERNAL, TRUE, "ops_limit", NULL,
|
| 273 |
|
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SWP_OPS_LIMIT, 0, INT32_MAX, &SWP_Options.OPS_Limit, NULL },
|
| 274 |
|
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#else
|
| 275 |
|
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{ OVK_INT32, OV_INTERNAL, TRUE, "ops_limit", NULL,
|
| 276 |
|
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SWP_OPS_LIMIT, 0, SWP_OPS_LIMIT, &SWP_Options.OPS_Limit, NULL },
|
| 277 |
|
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#endif
|
| 278 |
179 |
syang |
{ OVK_COUNT } /* List terminator -- must be last */
|
| 279 |
|
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};
|
| 280 |
|
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|
| 281 |
|
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/* Global register allocator options */
|
| 282 |
|
|
static OPTION_DESC Options_GRA[] = {
|
| 283 |
|
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{ OVK_BOOL, OV_INTERNAL, TRUE, "optimize_placement", "",
|
| 284 |
|
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0,0,0, &GRA_optimize_placement, NULL,
|
| 285 |
|
|
"Enable/disable movement of spills and restores created during splitting [Default TRUE]."
|
| 286 |
|
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},
|
| 287 |
749 |
hucheng |
#ifdef TARG_X8664
|
| 288 |
|
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{ OVK_INT32, OV_INTERNAL, TRUE, "local_forced_max", "local_forced_max",
|
| 289 |
|
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4, 0, 16, &GRA_local_forced_max, &GRA_local_forced_max_set,
|
| 290 |
|
|
"How many locals to force allocate (out of the number requested by LRA) [Default 4]"
|
| 291 |
|
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},
|
| 292 |
3577 |
leihuang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "unspill", "",
|
| 293 |
|
|
0,0,0, &GRA_unspill_enable, NULL,
|
| 294 |
|
|
"Enable/disable fusing of GRA spills and restores back to registers [Default FALSE]"
|
| 295 |
|
|
},
|
| 296 |
749 |
hucheng |
#else
|
| 297 |
179 |
syang |
{ OVK_INT32, OV_INTERNAL, TRUE, "local_forced_max", "",
|
| 298 |
|
|
4, 0, 32, &GRA_local_forced_max, NULL,
|
| 299 |
|
|
"How many locals to force allocate (out of the number requested by LRA) [Default 4]"
|
| 300 |
|
|
},
|
| 301 |
749 |
hucheng |
#endif // TARG_X8664
|
| 302 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "avoid_glue_references_for_locals", "",
|
| 303 |
|
|
0,0,0, &GRA_avoid_glue_references_for_locals,NULL,
|
| 304 |
|
|
"If possible grant the forced locals from the set of registers not referenced for glue copies in the same block. [Default TRUE]"
|
| 305 |
|
|
},
|
| 306 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "split_entry_exit_blocks", "",
|
| 307 |
|
|
0,0,0, &GRA_split_entry_exit_blocks,NULL,
|
| 308 |
|
|
"Enable/Disable splitting of entry/exit blocks for callee saved preferencing [Default TRUE]"
|
| 309 |
|
|
},
|
| 310 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "split_lranges", "",
|
| 311 |
|
|
0,0,0, &GRA_split_lranges, NULL,
|
| 312 |
|
|
"Turn on/off splitting of live ranges [Default TRUE]"
|
| 313 |
|
|
},
|
| 314 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "non_split_tn", "",
|
| 315 |
|
|
4, 0, INT32_MAX, &GRA_non_split_tn_id, NULL,
|
| 316 |
|
|
"Turn off live range splitting for a given TN specified by its tn number (n). [Default -1]"
|
| 317 |
|
|
},
|
| 318 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "non_preference_tn", "",
|
| 319 |
|
|
4, 0, INT32_MAX, &GRA_non_preference_tn_id, NULL,
|
| 320 |
|
|
"Turn off preferencing for a given TN specified by its tn number (n). [Default -1]"
|
| 321 |
|
|
},
|
| 322 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "use_old_conflict", "",
|
| 323 |
|
|
0,0,0, &GRA_use_old_conflict, NULL,
|
| 324 |
|
|
"Use old conflict graph algorithm ... not functioning at present."
|
| 325 |
|
|
},
|
| 326 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "shrink_wrap", "",
|
| 327 |
|
|
0,0,0, &GRA_shrink_wrap, NULL,
|
| 328 |
|
|
"Turn on/off shrink wrapping (currently, only for callee saved regs) [Default TRUE]"
|
| 329 |
|
|
},
|
| 330 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "loop_splitting", "",
|
| 331 |
|
|
0,0,0, &GRA_loop_splitting, NULL,
|
| 332 |
|
|
"Turn on/off loop directed live range splitting [Default TRUE]",
|
| 333 |
|
|
},
|
| 334 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "home", "",
|
| 335 |
|
|
0,0,0, &GRA_home, NULL,
|
| 336 |
|
|
"Turn on/off gra homing [Default FALSE]"
|
| 337 |
|
|
},
|
| 338 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "remove_spills", "",
|
| 339 |
|
|
0,0,0, &GRA_remove_spills, NULL,
|
| 340 |
|
|
"Turn on/off gra removal of spill instructions in Optimize_Placment [Default TRUE]"
|
| 341 |
|
|
},
|
| 342 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "ensure_spill_proximity", "",
|
| 343 |
|
|
0,0,0, &GRA_ensure_spill_proximity, NULL,
|
| 344 |
|
|
"Turn on/off gra placing spills close to use/def in block [Default TRUE]"
|
| 345 |
|
|
},
|
| 346 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "choose_best_split", "",
|
| 347 |
|
|
0,0,0, &GRA_choose_best_split, NULL,
|
| 348 |
|
|
"Turn on/off gra choosing best/smallest interim split found [Default TRUE]"
|
| 349 |
|
|
},
|
| 350 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "use_stacked_regs", "",
|
| 351 |
|
|
0,0,0, &GRA_use_stacked_regs, NULL,
|
| 352 |
|
|
"Turn on/off gra using stacked registers [Default TRUE]"
|
| 353 |
|
|
},
|
| 354 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "redo_liveness", "",
|
| 355 |
|
|
0,0,0, &GRA_redo_liveness, NULL,
|
| 356 |
|
|
"Turn on/off recalculation of liveness [Default FALSE]"
|
| 357 |
|
|
},
|
| 358 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "preference_globals", "",
|
| 359 |
|
|
0,0,0, &GRA_preference_globals, NULL,
|
| 360 |
|
|
"Turn on/off gra preferencing of global TNs (other than glue code) [Default TRUE]"
|
| 361 |
|
|
},
|
| 362 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "preference_dedicated", "",
|
| 363 |
|
|
0,0,0, &GRA_preference_dedicated, NULL,
|
| 364 |
|
|
"Turn on/off gra preferencing with dedicated TNs [Default TRUE]"
|
| 365 |
|
|
},
|
| 366 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "preference_glue", "",
|
| 367 |
|
|
0,0,0, &GRA_preference_glue, NULL,
|
| 368 |
|
|
"Turn on/off gra preferencing in glue code [Default TRUE]"
|
| 369 |
|
|
},
|
| 370 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "preference_all", "",
|
| 371 |
|
|
0,0,0, &GRA_preference_all, NULL,
|
| 372 |
|
|
"Turn on/off all gra preferencing [Default TRUE]"
|
| 373 |
|
|
},
|
| 374 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "non_home_low", "",
|
| 375 |
|
|
4, 0, INT32_MAX, &GRA_non_home_lo, NULL,
|
| 376 |
|
|
"Turn off homing for a TN range specified by its tn numbers. [Default INT32_MAX]"
|
| 377 |
|
|
},
|
| 378 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "non_home_hi", "",
|
| 379 |
|
|
4, 0, INT32_MAX, &GRA_non_home_hi, NULL,
|
| 380 |
|
|
"Turn off homing for a TN range specified by its tn numbers. [Default -1]"
|
| 381 |
|
|
},
|
| 382 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "recalc_liveness", "",
|
| 383 |
|
|
0,0,0, &GRA_recalc_liveness, NULL,
|
| 384 |
|
|
"Turn on/off recomputation of global liveness info [Default FALSE]"
|
| 385 |
|
|
},
|
| 386 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"call_split_freq", "",
|
| 387 |
566 |
marcel |
0, 0, 0, &GRA_call_split_freq_string, NULL,
|
| 388 |
179 |
syang |
"Threshold frequency of block containing a call below which a caller saved register will be preferred and live ranges spanning it will be split [Default .1]"
|
| 389 |
|
|
},
|
| 390 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"spill_count_factor", "",
|
| 391 |
566 |
marcel |
0, 0, 0, &GRA_spill_count_factor_string, NULL,
|
| 392 |
179 |
syang |
"Factor by which count of spills affects the priority of a split. Only valid under OPT:space [Default 0.5]"
|
| 393 |
|
|
},
|
| 394 |
3577 |
leihuang |
#ifdef KEY
|
| 395 |
749 |
hucheng |
{ OVK_BOOL, OV_INTERNAL, TRUE,"exclude_saved_regs", "",
|
| 396 |
|
|
0, 0, 0, &GRA_exclude_callee_saved_regs, NULL,
|
| 397 |
|
|
"If true, callee-saved registers are never used to allocate to variables by GRA"
|
| 398 |
|
|
},
|
| 399 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"eh_exclude_saved_regs", "",
|
| 400 |
|
|
0, 0, 0, &GRA_eh_exclude_callee_saved_regs, NULL,
|
| 401 |
|
|
"If true, callee-saved registers are never used to allocate to variables in functions with exception handlers"
|
| 402 |
|
|
},
|
| 403 |
3577 |
leihuang |
{ OVK_BOOL, OV_INTERNAL, TRUE,"fp_exclude_saved_regs", "",
|
| 404 |
|
|
0, 0, 0, &GRA_fp_exclude_callee_saved_regs, NULL,
|
| 405 |
|
|
"If true, floating-point callee-saved registers are never used to allocate to variables by GRA"
|
| 406 |
|
|
},
|
| 407 |
749 |
hucheng |
{ OVK_BOOL, OV_INTERNAL, TRUE, "optimize_boundary", "",
|
| 408 |
3577 |
leihuang |
0,0,0, &GRA_optimize_boundary, &GRA_optimize_boundary_set,
|
| 409 |
749 |
hucheng |
"Enable/disable reuse of registers in live range boundary basic blocks [Default FALSE]."
|
| 410 |
|
|
},
|
| 411 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "prioritize_by_density", "",
|
| 412 |
3577 |
leihuang |
0,0,0, &GRA_prioritize_by_density, &GRA_prioritize_by_density_set,
|
| 413 |
749 |
hucheng |
"Enable/disable prioritizing live ranges by reference density [Default FALSE]."
|
| 414 |
|
|
},
|
| 415 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "reclaim", "",
|
| 416 |
3577 |
leihuang |
0,0,0, &GRA_reclaim_register, &GRA_reclaim_register_set,
|
| 417 |
749 |
hucheng |
"Enable/disable reclaiming of registers after they have been allocated [Default FALSE]."
|
| 418 |
|
|
},
|
| 419 |
|
|
#endif // KEY
|
| 420 |
|
|
#ifdef TARG_X8664
|
| 421 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "grant_special_regs", "",
|
| 422 |
|
|
0,0,0, &GRA_grant_special_regs, NULL,
|
| 423 |
|
|
"Force GRA to always grant rax/rcx/rdx, whether LRA needs them or not."
|
| 424 |
|
|
},
|
| 425 |
|
|
#endif
|
| 426 |
179 |
syang |
{ OVK_COUNT } /* List terminator -- must be last */
|
| 427 |
|
|
};
|
| 428 |
3577 |
leihuang |
#endif // ! TARG_NVISA
|
| 429 |
179 |
syang |
|
| 430 |
|
|
static OPTION_DESC Options_CG[] = {
|
| 431 |
|
|
|
| 432 |
|
|
// Generic CG options.
|
| 433 |
|
|
|
| 434 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "warn_bad_freqs", "",
|
| 435 |
|
|
0, 0, 0, &CG_warn_bad_freqs, NULL },
|
| 436 |
749 |
hucheng |
#ifdef TARG_IA64
|
| 437 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "loop_opt", "loop_opt",
|
| 438 |
|
|
0, 0, 0, &CG_enable_loop_optimizations, NULL },
|
| 439 |
913 |
tianwei |
{ OVK_BOOL, OV_INTERNAL, TRUE, "tune_do_loop", "tune_do_loop",
|
| 440 |
|
|
0, 0, 0, &CG_tune_do_loop, NULL },
|
| 441 |
749 |
hucheng |
#endif
|
| 442 |
179 |
syang |
{ OVK_INT32, OV_INTERNAL, TRUE, "skip_before", "skip_b",
|
| 443 |
|
|
0, 0, INT32_MAX, &CG_skip_before, NULL },
|
| 444 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "skip_after", "skip_a",
|
| 445 |
|
|
0, 0, INT32_MAX, &CG_skip_after, NULL },
|
| 446 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "skip_equal", "skip_e",
|
| 447 |
|
|
0, 0, INT32_MAX, &CG_skip_equal, NULL },
|
| 448 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "local_skip_before", "local_skip_b",
|
| 449 |
|
|
0, 0, INT32_MAX, &CG_local_skip_before, NULL },
|
| 450 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "local_skip_after", "local_skip_a",
|
| 451 |
|
|
0, 0, INT32_MAX, &CG_local_skip_after, NULL },
|
| 452 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "local_skip_equal", "local_skip_e",
|
| 453 |
|
|
0, 0, INT32_MAX, &CG_local_skip_equal, NULL },
|
| 454 |
3577 |
leihuang |
#ifdef TARG_NVISA
|
| 455 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "skip_local_16bit", "",
|
| 456 |
|
|
0, 0, 0, &CG_skip_local_16bit, NULL },
|
| 457 |
|
|
#else
|
| 458 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "skip_local_hbf", "",
|
| 459 |
|
|
0, 0, 0, &CG_skip_local_hbf, NULL },
|
| 460 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "skip_local_loop", "",
|
| 461 |
|
|
0, 0, 0, &CG_skip_local_loop, NULL },
|
| 462 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "skip_local_swp", "",
|
| 463 |
|
|
0, 0, 0, &CG_skip_local_swp, NULL },
|
| 464 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "skip_local_ebo", "",
|
| 465 |
|
|
0, 0, 0, &CG_skip_local_ebo, NULL },
|
| 466 |
3577 |
leihuang |
#ifdef TARG_X8664
|
| 467 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "cmp_peep", "",
|
| 468 |
|
|
0, 0, 0, &CG_cmp_load_exec, NULL },
|
| 469 |
3934 |
dreachem |
{ OVK_BOOL, OV_VISIBLE, TRUE, "fma3_peep", "",
|
| 470 |
|
|
0, 0, 0, &CG_fma3_load_exec, NULL },
|
| 471 |
3577 |
leihuang |
{ OVK_BOOL, OV_VISIBLE, TRUE, "fma4_peep", "",
|
| 472 |
|
|
0, 0, 0, &CG_fma4_load_exec, NULL },
|
| 473 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "dsched", "",
|
| 474 |
|
|
0, 0, 0, &CG_dispatch_schedule, NULL },
|
| 475 |
3675 |
dreachem |
{ OVK_BOOL, OV_VISIBLE, TRUE, "nobest_fit", "",
|
| 476 |
|
|
0, 0, 0, &CG_LOOP_nounroll_best_fit_set, NULL },
|
| 477 |
3577 |
leihuang |
{ OVK_BOOL, OV_VISIBLE, TRUE, "unalign_st", "",
|
| 478 |
|
|
0, 0, 0, &CG_128bitstore, NULL },
|
| 479 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "brfuse", "",
|
| 480 |
|
|
0, 0, 0, &CG_branch_fuse, NULL },
|
| 481 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "strcmp_expand", "",
|
| 482 |
|
|
0, 0, 0, &CG_strcmp_expand, NULL },
|
| 483 |
3578 |
dreachem |
{ OVK_BOOL, OV_VISIBLE, TRUE, "merge_counters_x86", "",
|
| 484 |
3675 |
dreachem |
0, 0, 0, &CG_merge_counters_x86, &CG_merge_counters_x86_set },
|
| 485 |
3591 |
dreachem |
{ OVK_BOOL, OV_VISIBLE, TRUE, "interior_ptrs", "",
|
| 486 |
|
|
0, 0, 0, &CG_interior_ptrs_x86, NULL },
|
| 487 |
3675 |
dreachem |
{ OVK_BOOL, OV_VISIBLE, TRUE, "noavx_clear", "",
|
| 488 |
|
|
0, 0, 0, &CG_NoClear_Avx_Simd, NULL },
|
| 489 |
3577 |
leihuang |
#endif
|
| 490 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "skip_local_sched", "",
|
| 491 |
|
|
0, 0, 0, &CG_skip_local_sched, NULL },
|
| 492 |
3577 |
leihuang |
#endif //TARG_NVISA
|
| 493 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "optimization_level", "opt",
|
| 494 |
179 |
syang |
0, 0, MAX_OPT_LEVEL,
|
| 495 |
|
|
&CG_opt_level, &cg_opt_level_overridden },
|
| 496 |
749 |
hucheng |
|
| 497 |
3577 |
leihuang |
#ifdef TARG_NVISA
|
| 498 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "optimize_copies", "",
|
| 499 |
|
|
0, 0, 0, &CG_optimize_copies, NULL },
|
| 500 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "remove_typeconv", "",
|
| 501 |
|
|
0, 0, 0, &CG_remove_typeconv, NULL },
|
| 502 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "rematerialize_grf", "",
|
| 503 |
|
|
0, 0, 0, &CG_rematerialize_grf, &CG_rematerialize_grf_overridden},
|
| 504 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "use_16bit_ops", "",
|
| 505 |
|
|
0, 0, 0, &CG_use_16bit_ops, &CG_use_16bit_ops_overridden},
|
| 506 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "vector_loadstore", "",
|
| 507 |
|
|
0, 0, 0, &CG_vector_loadstore, NULL },
|
| 508 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"cflow", NULL,
|
| 509 |
|
|
0, 0, 0, &CFLOW_Enable, NULL },
|
| 510 |
|
|
#endif
|
| 511 |
|
|
|
| 512 |
|
|
#if !defined(TARG_NVISA)
|
| 513 |
749 |
hucheng |
// EBO options:
|
| 514 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "peephole_optimize", "",
|
| 515 |
|
|
0, 0, 0, &Enable_CG_Peephole, &Enable_CG_Peephole_overridden },
|
| 516 |
749 |
hucheng |
#ifdef TARG_IA64
|
| 517 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "ebo_post_proc_rgn", "",
|
| 518 |
|
|
0, 0, 0, &Enable_EBO_Post_Proc_Rgn , NULL},
|
| 519 |
749 |
hucheng |
#endif
|
| 520 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "create_madds", "create_madd",
|
| 521 |
|
|
0, 0, 0, &CG_create_madds, NULL },
|
| 522 |
749 |
hucheng |
#ifdef TARG_IA64
|
| 523 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "enable_ipfec_phases", "enable_ipfec",
|
| 524 |
179 |
syang |
0,0,0, &CG_Enable_Ipfec_Phases, NULL },
|
| 525 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "enable_cycle_counting", "enable_cycle",
|
| 526 |
749 |
hucheng |
0,0,0, &CG_Enable_Cycle_Count, NULL },
|
| 527 |
|
|
#endif
|
| 528 |
3577 |
leihuang |
#ifdef KEY
|
| 529 |
749 |
hucheng |
{ OVK_BOOL, OV_INTERNAL, TRUE, "test_coverage", "",
|
| 530 |
|
|
0, 0, 0, &flag_test_coverage, NULL},
|
| 531 |
|
|
{ OVK_LIST, OV_INTERNAL, FALSE, "profile_proc", "",
|
| 532 |
|
|
0, 0, 0, &Arc_Profile_Region, NULL},
|
| 533 |
|
|
{ OVK_LIST, OV_INTERNAL, FALSE, "profile_id1", "",
|
| 534 |
|
|
0, 0, 0, &Arc_Profile_Region, NULL},
|
| 535 |
|
|
{ OVK_LIST, OV_INTERNAL, FALSE, "profile_id2", "",
|
| 536 |
|
|
0, 0, 0, &Arc_Profile_Region, NULL},
|
| 537 |
|
|
{ OVK_INT32, OV_INTERNAL, FALSE, "cse_regs", "",
|
| 538 |
|
|
0, INT32_MIN, INT32_MAX, &CG_cse_regs, NULL},
|
| 539 |
|
|
{ OVK_INT32, OV_INTERNAL, FALSE, "sse_cse_regs", "",
|
| 540 |
|
|
0, INT32_MIN, INT32_MAX, &CG_sse_cse_regs, NULL},
|
| 541 |
|
|
#endif
|
| 542 |
|
|
#ifdef TARG_X8664
|
| 543 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "sse_load_execute", "sse_load_exe",
|
| 544 |
|
|
0, 0, INT32_MAX, &CG_sse_load_execute, NULL},
|
| 545 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "load_execute", "load_exe",
|
| 546 |
|
|
0, 0, INT32_MAX, &CG_load_execute, &cg_load_execute_overridden },
|
| 547 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "loadbw_execute", "loadbw_exe",
|
| 548 |
|
|
0, 0, 0, &CG_loadbw_execute, NULL },
|
| 549 |
861 |
hucheng |
{ OVK_BOOL, OV_INTERNAL, TRUE, "valgrind_friendly", "valgrind",
|
| 550 |
|
|
0, 0, 0, &CG_valgrind_friendly, NULL },
|
| 551 |
3577 |
leihuang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "movext_icmp", "movext_icmp",
|
| 552 |
|
|
0, 0, 0, &CG_Movext_ICMP, NULL },
|
| 553 |
749 |
hucheng |
#endif
|
| 554 |
179 |
syang |
|
| 555 |
|
|
// CG Dependence Graph related options.
|
| 556 |
|
|
|
| 557 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "ignore_lno", "",
|
| 558 |
|
|
0, 0, 0, &CG_DEP_Ignore_LNO, NULL },
|
| 559 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "ignore_wopt", "",
|
| 560 |
|
|
0, 0, 0, &CG_DEP_Ignore_WOPT, NULL },
|
| 561 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "addr_analysis", "",
|
| 562 |
|
|
0, 0, 0, &CG_DEP_Addr_Analysis, NULL },
|
| 563 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "verify_mem_deps", "",
|
| 564 |
|
|
0, 0, 0, &CG_DEP_Verify_Mem_Deps, NULL },
|
| 565 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "add_alloca_arcs", "",
|
| 566 |
|
|
0, 0, 0, &CG_DEP_Add_Alloca_Arcs, NULL },
|
| 567 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "relax_xfer_depndnce", "",
|
| 568 |
|
|
0, 0, 0, &CG_DEP_Relax_Xfer_Dependence, NULL },
|
| 569 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "adjust_ooo_latency", "adjust_ooo_latency",
|
| 570 |
|
|
0, 0, 0, &CG_DEP_Adjust_OOO_Latency, NULL },
|
| 571 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "prune_mem", "",
|
| 572 |
|
|
0, 0, INT32_MAX, &CG_DEP_Mem_Arc_Pruning,
|
| 573 |
|
|
&CG_DEP_Mem_Arc_Pruning_overridden },
|
| 574 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "prune_depndnce", "",
|
| 575 |
|
|
0, 0, 0, &CG_DEP_Prune_Dependence, NULL },
|
| 576 |
|
|
|
| 577 |
|
|
// Prefetching and load latency options.
|
| 578 |
|
|
|
| 579 |
749 |
hucheng |
#ifdef TARG_IA64
|
| 580 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, FALSE,"prefetch", "",
|
| 581 |
749 |
hucheng |
#else
|
| 582 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"prefetch", "",
|
| 583 |
|
|
#endif
|
| 584 |
179 |
syang |
0, 0, 0, &CG_enable_prefetch, &CG_enable_prefetch_overridden },
|
| 585 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"z_conf_prefetch", "",
|
| 586 |
|
|
0, 0, 0, &CG_enable_z_conf_prefetch,
|
| 587 |
|
|
&CG_enable_z_conf_prefetch_overridden },
|
| 588 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"nz_conf_prefetch", "",
|
| 589 |
|
|
0, 0, 0, &CG_enable_nz_conf_prefetch,
|
| 590 |
|
|
&CG_enable_nz_conf_prefetch_overridden },
|
| 591 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"pf_L1_ld", "",
|
| 592 |
|
|
0, 0, 0, &CG_enable_pf_L1_ld, &CG_enable_pf_L1_ld_overridden },
|
| 593 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"pf_L1_st", "",
|
| 594 |
|
|
0, 0, 0, &CG_enable_pf_L1_st, &CG_enable_pf_L1_st_overridden },
|
| 595 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"pf_L2_ld", "",
|
| 596 |
|
|
0, 0, 0, &CG_enable_pf_L2_ld, &CG_enable_pf_L2_ld_overridden },
|
| 597 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"pf_L2_st", "",
|
| 598 |
|
|
0, 0, 0, &CG_enable_pf_L2_st, &CG_enable_pf_L2_st_overridden },
|
| 599 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "exclusive_prefetch", "",
|
| 600 |
|
|
0, 0, 0, &CG_exclusive_prefetch, NULL },
|
| 601 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "L1_pf_latency", "",
|
| 602 |
|
|
0, 0, INT32_MAX, &CG_L1_pf_latency, &CG_L1_pf_latency_overridden },
|
| 603 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "L2_pf_latency", "",
|
| 604 |
|
|
0, 0, INT32_MAX, &CG_L2_pf_latency, &CG_L2_pf_latency_overridden },
|
| 605 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "L1_ld_latency", "",
|
| 606 |
|
|
0, 0, INT32_MAX, &CG_L1_ld_latency, &CG_L1_ld_latency_overridden },
|
| 607 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "L2_ld_latency", "",
|
| 608 |
|
|
0, 0, INT32_MAX, &CG_L2_ld_latency, &CG_L2_ld_latency_overridden },
|
| 609 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "z_conf_L1_ld_latency", "",
|
| 610 |
|
|
0, 0, INT32_MAX, &CG_z_conf_L1_ld_latency, NULL },
|
| 611 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "z_conf_L2_ld_latency", "",
|
| 612 |
|
|
0, 0, INT32_MAX, &CG_z_conf_L2_ld_latency, NULL },
|
| 613 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "ld_latency", "",
|
| 614 |
|
|
0, 0, INT32_MAX, &CG_ld_latency, NULL },
|
| 615 |
749 |
hucheng |
|
| 616 |
179 |
syang |
// CGLOOP options.
|
| 617 |
|
|
|
| 618 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "loop_opt", "loop_opt",
|
| 619 |
|
|
0, 0, 0, &CG_enable_loop_optimizations, NULL },
|
| 620 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "opt_non_trip_countable", "opt_non_trip",
|
| 621 |
|
|
0, 0, 0, &CG_LOOP_optimize_non_trip_countable, NULL },
|
| 622 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "opt_lno_winddown_cache", NULL,
|
| 623 |
|
|
0, 0, 0, &CG_LOOP_optimize_lno_winddown_cache, NULL },
|
| 624 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "opt_lno_winddown_reg", NULL,
|
| 625 |
|
|
0, 0, 0, &CG_LOOP_optimize_lno_winddown_reg, NULL },
|
| 626 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "opt_non_innermost", "opt_non_inner",
|
| 627 |
|
|
0, 0, 0, &CG_LOOP_optimize_non_innermost, NULL },
|
| 628 |
|
|
|
| 629 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "fix_recurrences", "",
|
| 630 |
|
|
0, 0, 0, &CG_LOOP_fix_recurrences,
|
| 631 |
|
|
&CG_LOOP_fix_recurrences_specified },
|
| 632 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "back_substitution", "",
|
| 633 |
|
|
0, 0, 0, &CG_LOOP_back_substitution,
|
| 634 |
|
|
&CG_LOOP_back_substitution_specified },
|
| 635 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "back_substitution_variant", "",
|
| 636 |
|
|
0, 0, 0, &CG_LOOP_back_substitution_variant,
|
| 637 |
|
|
&CG_LOOP_back_substitution_variant_specified },
|
| 638 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "interleave_reductions", "",
|
| 639 |
|
|
0, 0, 0, &CG_LOOP_interleave_reductions,
|
| 640 |
|
|
&CG_LOOP_interleave_reductions_specified },
|
| 641 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "interleave_posti", "",
|
| 642 |
|
|
0, 0, 0, &CG_LOOP_interleave_posti,
|
| 643 |
|
|
&CG_LOOP_interleave_posti_specified },
|
| 644 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "reassociate", "reassoc",
|
| 645 |
|
|
0, 0, 0, &CG_LOOP_reassociate,
|
| 646 |
|
|
&CG_LOOP_reassociate_specified },
|
| 647 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "recurrence_min_omega", "",
|
| 648 |
|
|
0, 0, INT32_MAX, &CG_LOOP_recurrence_min_omega, NULL },
|
| 649 |
3577 |
leihuang |
#ifdef KEY
|
| 650 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "recurrence_max_omega", "",
|
| 651 |
|
|
0, 0, 16, &CG_LOOP_recurrence_max_omega, NULL },
|
| 652 |
749 |
hucheng |
{ OVK_INT32, OV_INTERNAL, TRUE, "loop_limit", "",
|
| 653 |
|
|
INT32_MAX, 0, INT32_MAX, &CG_Enable_Loop_Opt_Limit, NULL },
|
| 654 |
|
|
#endif
|
| 655 |
3577 |
leihuang |
#ifdef TARG_X8664
|
| 656 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "cloop", "",
|
| 657 |
|
|
0, 0, 0, &CG_LOOP_cloop, NULL },
|
| 658 |
|
|
#endif
|
| 659 |
|
|
#if defined(TARG_SL)
|
| 660 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "zdl_enabled_level", "",
|
| 661 |
|
|
INT32_MAX, 0, INT32_MAX, &CG_zdl_enabled_level, NULL },
|
| 662 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "opt_condmv", "",
|
| 663 |
|
|
0, 0, 0, &CG_enable_opt_condmv, NULL},
|
| 664 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "CBUS_workaround", "",
|
| 665 |
|
|
0, 0, 0, &CG_enable_CBUS_workaround, NULL},
|
| 666 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "LD_NOP_workaround", "",
|
| 667 |
|
|
0, 0, 0, &CG_enable_LD_NOP_workaround, NULL},
|
| 668 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "C3_AR_dependence_workaround", "",
|
| 669 |
|
|
0, 0, 0, &CG_enbale_C3_AR_dependence_workaround, NULL},
|
| 670 |
|
|
|
| 671 |
|
|
/* For SL2, I need a options to tell what application I'm comping.
|
| 672 |
|
|
* So I can get the right LUT file
|
| 673 |
|
|
*/
|
| 674 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"app_name", "",
|
| 675 |
|
|
0, 0, 0, &App_Name, NULL },
|
| 676 |
|
|
|
| 677 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"cand_pattern", "",
|
| 678 |
|
|
0, 0, 0, &Cand_List_Pattern, NULL },
|
| 679 |
|
|
|
| 680 |
|
|
#endif
|
| 681 |
|
|
|
| 682 |
749 |
hucheng |
// CG Unrolling options - see also OPT:unroll_times_max:unroll_size.
|
| 683 |
3577 |
leihuang |
{ OVK_BOOL, OV_INTERNAL, TRUE,"unroll_non_trip_countable", "unroll_non_trip",
|
| 684 |
|
|
0, 0, 0, &CG_LOOP_unroll_non_trip_countable, NULL },
|
| 685 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"unroll_fully", "unroll_full",
|
| 686 |
|
|
0, 0, 0, &CG_LOOP_unroll_fully, NULL },
|
| 687 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"unroll_remainder_fully", "unroll_remainder_full",
|
| 688 |
|
|
0, 0, 0, &CG_LOOP_unroll_remainder_fully, NULL },
|
| 689 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE,"unroll_fb_req", "",
|
| 690 |
|
|
0, 0, 0, &CG_LOOP_unroll_fb_required, NULL },
|
| 691 |
179 |
syang |
|
| 692 |
|
|
// Cross Iteration Loop Optimization options.
|
| 693 |
|
|
|
| 694 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "cio_copy_removal", "",
|
| 695 |
|
|
0, 0, 0, &CIO_enable_copy_removal, NULL },
|
| 696 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "cio_read_removal", "",
|
| 697 |
|
|
0, 0, 0, &CIO_enable_read_removal, NULL },
|
| 698 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "cio_write_removal", "",
|
| 699 |
|
|
0, 0, 0, &CIO_enable_write_removal, NULL },
|
| 700 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "cio_cse_removal", "",
|
| 701 |
|
|
0, 0, 0, &CIO_enable_cse_removal, NULL },
|
| 702 |
3577 |
leihuang |
{ OVK_INT32, OV_INTERNAL, TRUE, "cio_rw_max_omega", "",
|
| 703 |
179 |
syang |
8, 0, INT32_MAX, &CIO_rw_max_omega, NULL },
|
| 704 |
|
|
|
| 705 |
|
|
// Control flow optimizations (CFLOW) options.
|
| 706 |
|
|
|
| 707 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "unique_exit", "",
|
| 708 |
|
|
0, 0, 0, &CG_unique_exit, NULL },
|
| 709 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "tail_call", "",
|
| 710 |
|
|
0, 0, 0, &CG_tail_call, &CG_tail_call_overridden },
|
| 711 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"cflow_before_cgprep", NULL,
|
| 712 |
|
|
0, 0, 0, &CFLOW_opt_before_cgprep, NULL },
|
| 713 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"cflow_after_cgprep", "cflow_after_cgprep",
|
| 714 |
|
|
0, 0, 0, &CFLOW_opt_after_cgprep, NULL },
|
| 715 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE,"ebo_level", "ebo",
|
| 716 |
|
|
0, INT32_MIN, INT32_MAX, &EBO_Opt_Level, &EBO_Opt_Level_overridden },
|
| 717 |
3577 |
leihuang |
#ifdef KEY
|
| 718 |
749 |
hucheng |
{ OVK_INT32, OV_INTERNAL, TRUE,"ebo_opt_mask", "",
|
| 719 |
|
|
0, INT32_MIN, INT32_MAX, &EBO_Opt_Mask, NULL },
|
| 720 |
|
|
#endif
|
| 721 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE,"cflow", NULL,
|
| 722 |
|
|
0, 0, 0, &CFLOW_Enable, NULL },
|
| 723 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"cflow_unreachable", "",
|
| 724 |
|
|
0, 0, 0, &CFLOW_Enable_Unreachable, NULL },
|
| 725 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"cflow_branch", "",
|
| 726 |
|
|
0, 0, 0, &CFLOW_Enable_Branch, NULL },
|
| 727 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"cflow_merge", "",
|
| 728 |
|
|
0, 0, 0, &CFLOW_Enable_Merge, NULL },
|
| 729 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"cflow_reorder", "",
|
| 730 |
|
|
0, 0, 0, &CFLOW_Enable_Reorder, NULL },
|
| 731 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"cflow_clone", "",
|
| 732 |
|
|
0, 0, 0, &CFLOW_Enable_Clone, &CFLOW_Enable_Clone_overridden },
|
| 733 |
749 |
hucheng |
#ifdef KEY
|
| 734 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"cflow_freq_order", "cflow_freq_order",
|
| 735 |
|
|
0, 0, 0, &CFLOW_Enable_Freq_Order, NULL },
|
| 736 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"cflow_freq_order_on_heu", "cflow_freq_order_on_heu",
|
| 737 |
|
|
0, 0, 0, &CFLOW_Enable_Freq_Order_On_Heuristics, NULL },
|
| 738 |
|
|
#else
|
| 739 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE,"cflow_freq_order", "",
|
| 740 |
|
|
0, 0, 0, &CFLOW_Enable_Freq_Order, NULL },
|
| 741 |
749 |
hucheng |
{ OVK_BOOL, OV_INTERNAL, TRUE,"cflow_freq_order_on_heu", "",
|
| 742 |
|
|
0, 0, 0, &CFLOW_Enable_Freq_Order_On_Heuristics, NULL },
|
| 743 |
|
|
#endif // KEY
|
| 744 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE,"cflow_opt_all_br_to_bcond", "",
|
| 745 |
|
|
0, 0, 0, &CFLOW_opt_all_br_to_bcond, NULL },
|
| 746 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"cflow_heuristic_tolerance", "",
|
| 747 |
|
|
0, 0, 0, &CFLOW_heuristic_tolerance, NULL },
|
| 748 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"cflow_feedback_tolerance", "",
|
| 749 |
|
|
0, 0, 0, &CFLOW_feedback_tolerance, NULL },
|
| 750 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE,"cflow_clone_incr", "cflow_clone_i",
|
| 751 |
|
|
0, 0, 100, &CFLOW_clone_incr, &clone_incr_overridden },
|
| 752 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE,"cflow_clone_min_incr", "cflow_clone_mi",
|
| 753 |
|
|
0, 0, INT32_MAX, &CFLOW_clone_min_incr, &clone_min_incr_overridden },
|
| 754 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE,"cflow_clone_max_incr", "cflow_clone_ma",
|
| 755 |
|
|
0, 0, INT32_MAX, &CFLOW_clone_max_incr, &clone_max_incr_overridden },
|
| 756 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"cflow_cold_threshold", "",
|
| 757 |
|
|
0, 0, 0, &CFLOW_cold_threshold, NULL },
|
| 758 |
|
|
|
| 759 |
|
|
// Frequency heuristic/feedback options.
|
| 760 |
|
|
|
| 761 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"enable_frequency", "",
|
| 762 |
|
|
0, 0, 0, &FREQ_enable, NULL },
|
| 763 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"eh_freq", "",
|
| 764 |
|
|
0, 0, 0, &FREQ_eh_freq, NULL },
|
| 765 |
3577 |
leihuang |
#ifdef KEY
|
| 766 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"non_local_targ_freq", "",
|
| 767 |
|
|
0, 0, 0, &FREQ_non_local_targ_freq, NULL },
|
| 768 |
|
|
#endif
|
| 769 |
179 |
syang |
{ OVK_NAME, OV_INTERNAL, TRUE,"freq_frequent_never_ratio", "",
|
| 770 |
|
|
0, 0, 0, &FREQ_frequent_never_ratio, NULL },
|
| 771 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "freq_view_cfg", "",
|
| 772 |
|
|
0, 0, 0, &FREQ_view_cfg, NULL },
|
| 773 |
3577 |
leihuang |
#endif // ! TARG_NVISA
|
| 774 |
179 |
syang |
|
| 775 |
|
|
// Whirl2ops / Expander options.
|
| 776 |
|
|
|
| 777 |
3577 |
leihuang |
{ OVK_BOOL, OV_VISIBLE, TRUE, "divrem_opt", "",
|
| 778 |
|
|
0, 0, 0, &CG_divrem_opt, NULL },
|
| 779 |
179 |
syang |
{ OVK_NAME, OV_INTERNAL, TRUE,"fdiv_algorithm", "fdiv",
|
| 780 |
|
|
0, 0, 0, &CGEXP_fdiv_algorithm, NULL },
|
| 781 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"sqrt_algorithm", "sqrt",
|
| 782 |
|
|
0, 0, 0, &CGEXP_sqrt_algorithm, NULL },
|
| 783 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"use_copyfcc", "",
|
| 784 |
|
|
0, 0, 0, &CGEXP_use_copyfcc, NULL },
|
| 785 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE,"expconst", "",
|
| 786 |
|
|
DEFAULT_CGEXP_CONSTANT, 0, INT32_MAX, &CGEXP_expandconstant, NULL },
|
| 787 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"normalize_logical", "normalize",
|
| 788 |
|
|
0, 0, 0, &CGEXP_normalize_logical, NULL },
|
| 789 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"gp_prolog_call_shared", "gp_prolog",
|
| 790 |
|
|
0, 0, 0, &CGEXP_gp_prolog_call_shared, NULL },
|
| 791 |
3577 |
leihuang |
#ifdef KEY
|
| 792 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"integer_multiply_by_constant", "integer_multiply_by_constant",
|
| 793 |
|
|
0, 0, 0, &CGEXP_cvrt_int_mult_to_add_shift, &Integer_Multiply_By_Constant_overridden },
|
| 794 |
|
|
#endif
|
| 795 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE,"integer_divide_by_constant", "integer_divide_by_constant",
|
| 796 |
|
|
0, 0, 0, &CGEXP_cvrt_int_div_to_mult, &Integer_Divide_By_Constant_overridden },
|
| 797 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"integer_divide_use_float", "integer_divide_use_float",
|
| 798 |
|
|
0, 0, 0, &CGEXP_cvrt_int_div_to_fdiv, &Integer_Divide_Use_Float_overridden },
|
| 799 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"fast_imul", "",
|
| 800 |
|
|
0, 0, 0, &CGEXP_fast_imul, NULL },
|
| 801 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"float_consts_from_ints", "",
|
| 802 |
|
|
0, 0, 0, &CGEXP_float_consts_from_ints, NULL },
|
| 803 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"float_div_by_const", "",
|
| 804 |
|
|
0, 0, 0, &CGEXP_opt_float_div_by_const, NULL },
|
| 805 |
|
|
|
| 806 |
3577 |
leihuang |
#ifdef TARG_LOONGSON
|
| 807 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE,"use_loongson2e_multdivmod", "",
|
| 808 |
|
|
0, 0, 0, &CGEXP_use_Loongson2e_MultDivMod, NULL },
|
| 809 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"float_use_madd", "",
|
| 810 |
|
|
0, 0, 0, &CGEXP_float_use_madd, NULL },
|
| 811 |
|
|
#endif
|
| 812 |
179 |
syang |
{ OVK_NAME, OV_INTERNAL, TRUE,"lfhint_L1", "",
|
| 813 |
|
|
0, 0, 0, &CGEXP_lfhint_L1, NULL },
|
| 814 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"lfhint_L2", "",
|
| 815 |
|
|
0, 0, 0, &CGEXP_lfhint_L2, NULL },
|
| 816 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"ldhint_L1", "",
|
| 817 |
|
|
0, 0, 0, &CGEXP_ldhint_L1, NULL },
|
| 818 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"ldhint_L2", "",
|
| 819 |
|
|
0, 0, 0, &CGEXP_ldhint_L2, NULL },
|
| 820 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"sthint_L1", "",
|
| 821 |
|
|
0, 0, 0, &CGEXP_sthint_L1, NULL },
|
| 822 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"sthint_L2", "",
|
| 823 |
|
|
0, 0, 0, &CGEXP_sthint_L2, NULL },
|
| 824 |
3577 |
leihuang |
#ifdef TARG_NVISA
|
| 825 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"auto_as_static", "",
|
| 826 |
|
|
0, 0, 0, &CGEXP_auto_as_static, NULL },
|
| 827 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"gen_ccodes", "",
|
| 828 |
|
|
0, 0, 0, &CGEXP_gen_ccodes, NULL },
|
| 829 |
|
|
#endif
|
| 830 |
179 |
syang |
|
| 831 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "localize", "localize",
|
| 832 |
|
|
0, 0, 0, &CG_localize_tns, &CG_localize_tns_Set},
|
| 833 |
749 |
hucheng |
#ifdef TARG_X8664
|
| 834 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "localize_x87", "localize_x87",
|
| 835 |
|
|
0, 0, 0, &CG_localize_x87_tns, &CG_localize_x87_tns_Set,
|
| 836 |
|
|
"Localize x87 floating point variables. Has no effect on integer variables. Default off."
|
| 837 |
|
|
},
|
| 838 |
|
|
#endif
|
| 839 |
1107 |
syang |
#ifdef TARG_IA64
|
| 840 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "ldxmov", "",
|
| 841 |
|
|
0,0,0, &CG_Enable_Ldxmov_Support, NULL },
|
| 842 |
|
|
#endif
|
| 843 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "localize_using_stacked_regs", "localize_using_stack",
|
| 844 |
|
|
0, 0, 0, &LOCALIZE_using_stacked_regs, NULL },
|
| 845 |
|
|
|
| 846 |
3577 |
leihuang |
#if !defined(TARG_NVISA)
|
| 847 |
179 |
syang |
// Local Register Allocation (LRA) options.
|
| 848 |
|
|
|
| 849 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"rematerialize", "remat",
|
| 850 |
|
|
0, 0, 0, &CGSPILL_Rematerialize_Constants, NULL },
|
| 851 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"force_rematerialization", "force_remat",
|
| 852 |
|
|
0, 0, 0, &CGSPILL_Enable_Force_Rematerialization, NULL },
|
| 853 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"lra_reorder", "",
|
| 854 |
|
|
0, 0, 0, &LRA_do_reorder, NULL },
|
| 855 |
3577 |
leihuang |
#if defined(TARG_SL)
|
| 856 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"check_reg_alloc", "",
|
| 857 |
|
|
0, 0, 0, &Enable_Checking_Register_Allocation, NULL },
|
| 858 |
|
|
#endif
|
| 859 |
749 |
hucheng |
#ifdef TARG_X8664
|
| 860 |
|
|
{ OVK_BOOL, OV_INTERNAL, FALSE, "prefer_legacy_regs", "",
|
| 861 |
|
|
0, 0, 0, &LRA_prefer_legacy_regs, NULL },
|
| 862 |
|
|
#endif
|
| 863 |
|
|
#ifdef KEY
|
| 864 |
3577 |
leihuang |
{ OVK_INT32, OV_INTERNAL, TRUE, "inflate_reg_request", "inflate_reg",
|
| 865 |
|
|
0, 0, 100, &LRA_inflate_reg_request, &LRA_inflate_reg_request_Set,
|
| 866 |
|
|
"Inflate LRA register request by this percentage for innermost loops [Default 0]"},
|
| 867 |
|
|
{ OVK_BOOL, OV_INTERNAL, FALSE, "prefer_lru_reg", "",
|
| 868 |
|
|
1, 0, 0, &LRA_prefer_lru_reg, &LRA_prefer_lru_reg_Set },
|
| 869 |
749 |
hucheng |
{ OVK_BOOL, OV_INTERNAL, TRUE, "min_spill_loc_size", "",
|
| 870 |
|
|
0,0,0, &CG_min_spill_loc_size, NULL,
|
| 871 |
|
|
"Turn on/off minimize spill location size [Default FALSE]"
|
| 872 |
|
|
},
|
| 873 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "min_stack_size", "",
|
| 874 |
|
|
0,0,0, &CG_min_stack_size, NULL,
|
| 875 |
|
|
"Turn on/off minimize stack size [Default TRUE]"
|
| 876 |
|
|
},
|
| 877 |
|
|
#endif
|
| 878 |
179 |
syang |
|
| 879 |
|
|
// Global Code Motion (GCM) options.
|
| 880 |
|
|
|
| 881 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "gcm", "gcm",
|
| 882 |
|
|
0, 0, 0, &GCM_Enable_Scheduling, NULL },
|
| 883 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "pre_gcm", "pre_gcm",
|
| 884 |
|
|
0, 0, 0, &GCM_PRE_Enable_Scheduling, NULL },
|
| 885 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "post_gcm", "post_gcm",
|
| 886 |
|
|
0, 0, 0, &GCM_POST_Enable_Scheduling, NULL },
|
| 887 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "force_post_gcm", "force_post_gcm",
|
| 888 |
|
|
0, 0, 0, &GCM_POST_Force_Scheduling, NULL },
|
| 889 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "cflow_after_gcm", "cflow_after_gcm",
|
| 890 |
|
|
0, 0, 0, &GCM_Enable_Cflow, NULL},
|
| 891 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "cross_call_motion", "",
|
| 892 |
|
|
0, 0, 0, &GCM_Motion_Across_Calls, NULL},
|
| 893 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "use_sched_est", "use_sched_est",
|
| 894 |
|
|
0, 0, 0, &GCM_Use_Sched_Est, NULL},
|
| 895 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "pre_spec_loads", "",
|
| 896 |
|
|
0, 0, 0, &GCM_PRE_Spec_Loads, NULL},
|
| 897 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "post_spec_loads", "",
|
| 898 |
|
|
0, 0, 0, &GCM_POST_Spec_Loads, NULL},
|
| 899 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "pointer_speculation", "",
|
| 900 |
|
|
0, 0, 0, &GCM_Pointer_Spec, NULL},
|
| 901 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "speculative_ptr_deref", "",
|
| 902 |
|
|
0, 0, 0, &GCM_Eager_Ptr_Deref, NULL},
|
| 903 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "speculative_loads", "",
|
| 904 |
|
|
0, 0, 0, &GCM_Speculative_Loads, NULL},
|
| 905 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "predicated_loads", "",
|
| 906 |
|
|
0, 0, 0, &GCM_Predicated_Loads, NULL},
|
| 907 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "forw_circ_motion", "",
|
| 908 |
|
|
0, 0, 0, &GCM_Forw_Circ_Motion, NULL},
|
| 909 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "gcm_minimize_reg_usage", "",
|
| 910 |
|
|
0, 0, 0, &GCM_Min_Reg_Usage, NULL},
|
| 911 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "gcm_test", "",
|
| 912 |
|
|
0, 0, 0, &GCM_Test, NULL},
|
| 913 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "skip_gcm", "",
|
| 914 |
|
|
0, 0, 0, &CG_Skip_GCM, NULL},
|
| 915 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE,"gcm_from_bb", "",
|
| 916 |
|
|
0, 0, INT32_MAX, &GCM_From_BB, NULL },
|
| 917 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE,"gcm_to_bb", "",
|
| 918 |
|
|
0, 0, INT32_MAX, &GCM_To_BB, NULL },
|
| 919 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE,"gcm_result_tn", "",
|
| 920 |
|
|
0, 0, INT32_MAX, &GCM_Result_TN, NULL },
|
| 921 |
3577 |
leihuang |
#ifdef KEY
|
| 922 |
749 |
hucheng |
// Consider no more than this number of candidate target bb's.
|
| 923 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE,"gcm_bb_limit", "",
|
| 924 |
|
|
0, 0, INT32_MAX, &GCM_BB_Limit, NULL },
|
| 925 |
|
|
#endif
|
| 926 |
179 |
syang |
|
| 927 |
|
|
// Local Scheduling (LOCS) and HyperBlock Scheduling (HBS) options.
|
| 928 |
|
|
|
| 929 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"local_scheduler", "local_sched",
|
| 930 |
|
|
0, 0, 0, &LOCS_Enable_Scheduling, NULL },
|
| 931 |
3578 |
dreachem |
{ OVK_INT32, OV_INTERNAL, TRUE,"pre_minreg_level", "pre_minreg_level",
|
| 932 |
|
|
0, 1, 2, &LOCS_PRE_Enable_Minreg_Level, NULL },
|
| 933 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE,"pre_local_scheduler", "pre_local_sched",
|
| 934 |
|
|
0, 0, 0, &LOCS_PRE_Enable_Scheduling, NULL },
|
| 935 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"post_local_scheduler", "post_local_sched",
|
| 936 |
|
|
0, 0, 0, &LOCS_POST_Enable_Scheduling, NULL },
|
| 937 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"branch_likely", "branch_l",
|
| 938 |
|
|
0, 0, 0, &CGTARG_Enable_Brlikely, NULL },
|
| 939 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"fill_delay_slots", "fill_delay",
|
| 940 |
|
|
0, 0, 0, &Enable_Fill_Delay_Slots, NULL },
|
| 941 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"branch_taken_prob", "",
|
| 942 |
|
|
0, 0, 0, &CGTARG_Branch_Taken_Prob,
|
| 943 |
|
|
&CGTARG_Branch_Taken_Prob_overridden},
|
| 944 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"locs_form_bundles", "locs_form_bundles",
|
| 945 |
|
|
0, 0, 0, &LOCS_Enable_Bundle_Formation, NULL },
|
| 946 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "pre_hb_scheduler", "pre_hb_sched",
|
| 947 |
|
|
0, 0, 0, &IGLS_Enable_PRE_HB_Scheduling, NULL },
|
| 948 |
|
|
{OVK_BOOL, OV_INTERNAL, TRUE, "post_hb_scheduler", "post_hb_sched",
|
| 949 |
|
|
0, 0, 0, &IGLS_Enable_POST_HB_Scheduling, NULL },
|
| 950 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"hb_scheduler", "hb_sched",
|
| 951 |
|
|
0, 0, 0, &IGLS_Enable_HB_Scheduling, NULL },
|
| 952 |
3577 |
leihuang |
#if defined(TARG_SL)
|
| 953 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "local_sched_pu_skip_before", "local_sched_pu_skip_b",
|
| 954 |
|
|
-1, 0, INT32_MAX, &CG_local_sched_pu_skip_before, NULL },
|
| 955 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "local_sched_pu_skip_after", "local_sched_pu_skip_a",
|
| 956 |
|
|
-1, 0, INT32_MAX, &CG_local_sched_pu_skip_after, NULL },
|
| 957 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "local_sched_pu_skip_equal", "local_sched_pu_skip_e",
|
| 958 |
|
|
-1, 0, INT32_MAX, &CG_local_sched_pu_skip_equal, NULL },
|
| 959 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "local_sched_bb_skip_before", "local_sched_bb_skip_b",
|
| 960 |
|
|
-1, 0, INT32_MAX, &CG_local_sched_bb_skip_before, NULL },
|
| 961 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "local_sched_bb_skip_after", "local_sched_bb_skip_a",
|
| 962 |
|
|
-1, 0, INT32_MAX, &CG_local_sched_bb_skip_after, NULL },
|
| 963 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "local_sched_bb_skip_equal", "local_sched_bb_skip_e",
|
| 964 |
|
|
-1, 0, INT32_MAX, &CG_local_sched_bb_skip_equal, NULL },
|
| 965 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "local_sched_op_skip_after", "local_sched_op_skip_a",
|
| 966 |
|
|
-1, 0, INT32_MAX, &CG_local_sched_op_skip_after, NULL },
|
| 967 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "bb_sched_op_max", "bb_sched_op_max",
|
| 968 |
|
|
0, 0, INT32_MAX, &CG_bb_sched_op_num_max, NULL },
|
| 969 |
|
|
/* The following nine are for GCM binary search */
|
| 970 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "gcm_skip_before", "gcm_skip_b",
|
| 971 |
|
|
-1, 0, INT32_MAX, &CG_GCM_skip_before, NULL },
|
| 972 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "gcm_skip_after", "gcm_skip_a",
|
| 973 |
|
|
-1, 0, INT32_MAX, &CG_GCM_skip_after, NULL },
|
| 974 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "gcm_skip_equal", "gcm_skip_e",
|
| 975 |
|
|
-1, 0, INT32_MAX, &CG_GCM_skip_equal, NULL },
|
| 976 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "gcm_loop_skip_before", "gcm_loop_skip_b",
|
| 977 |
|
|
-1, 0, INT32_MAX, &CG_GCM_loop_skip_before, NULL },
|
| 978 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "gcm_loop_skip_after", "gcm_loop_skip_a",
|
| 979 |
|
|
-1, 0, INT32_MAX, &CG_GCM_loop_skip_after, NULL },
|
| 980 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "gcm_loop_skip_equal", "gcm_loop_skip_e",
|
| 981 |
|
|
-1, 0, INT32_MAX, &CG_GCM_loop_skip_equal, NULL },
|
| 982 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "gcm_op_skip_before", "gcm_op_skip_b",
|
| 983 |
|
|
-1, 0, INT32_MAX, &CG_GCM_op_skip_before, NULL },
|
| 984 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "gcm_op_skip_after", "gcm_op_skip_a",
|
| 985 |
|
|
-1, 0, INT32_MAX, &CG_GCM_op_skip_after, NULL },
|
| 986 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "gcm_op_skip_equal", "gcm_op_skip_e",
|
| 987 |
|
|
-1, 0, INT32_MAX, &CG_GCM_op_skip_equal, NULL },
|
| 988 |
|
|
|
| 989 |
|
|
// binary search options for LICM in GCM
|
| 990 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "gcm_licm_loop_skip_before", "gcm_licm_loop_skip_b",
|
| 991 |
|
|
-1, 0, INT32_MAX, &CG_GCM_LICM_loop_skip_before, NULL },
|
| 992 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "gcm_licm_loop_skip_after", "gcm_licm_loop_skip_a",
|
| 993 |
|
|
-1, 0, INT32_MAX, &CG_GCM_LICM_loop_skip_after, NULL },
|
| 994 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "gcm_licm_loop_skip_equal", "gcm_licm_loop_skip_e",
|
| 995 |
|
|
-1, 0, INT32_MAX, &CG_GCM_LICM_loop_skip_equal, NULL },
|
| 996 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "gcm_licm_op_skip_before", "gcm_licm_op_skip_b",
|
| 997 |
|
|
-1, 0, INT32_MAX, &CG_GCM_LICM_op_skip_before, NULL },
|
| 998 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "gcm_licm_op_skip_after", "gcm_licm_op_skip_a",
|
| 999 |
|
|
-1, 0, INT32_MAX, &CG_GCM_LICM_op_skip_after, NULL },
|
| 1000 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "gcm_licm_op_skip_equal", "gcm_licm_op_skip_e",
|
| 1001 |
|
|
-1, 0, INT32_MAX, &CG_GCM_LICM_op_skip_equal, NULL },
|
| 1002 |
|
|
|
| 1003 |
|
|
// binary search options for DCE in GCM
|
| 1004 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "loop_dce_loop_skip_before", "loop_dce_loop_skip_b",
|
| 1005 |
|
|
-1, 0, INT32_MAX, &CG_LOOP_DCE_loop_skip_before, NULL },
|
| 1006 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "loop_dce_loop_skip_after", "loop_dce_loop_skip_a",
|
| 1007 |
|
|
-1, 0, INT32_MAX, &CG_LOOP_DCE_loop_skip_after, NULL },
|
| 1008 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "loop_dce_loop_skip_equal", "loop_dce_loop_skip_e",
|
| 1009 |
|
|
-1, 0, INT32_MAX, &CG_LOOP_DCE_loop_skip_equal, NULL },
|
| 1010 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "loop_dce_op_skip_before", "loop_dce_op_skip_b",
|
| 1011 |
|
|
-1, 0, INT32_MAX, &CG_LOOP_DCE_op_skip_before, NULL },
|
| 1012 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "loop_dce_op_skip_after", "loop_dce_op_skip_a",
|
| 1013 |
|
|
-1, 0, INT32_MAX, &CG_LOOP_DCE_op_skip_after, NULL },
|
| 1014 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "loop_dce_op_skip_equal", "loop_dce_op_skip_e",
|
| 1015 |
|
|
-1, 0, INT32_MAX, &CG_LOOP_DCE_op_skip_equal, NULL },
|
| 1016 |
|
|
|
| 1017 |
|
|
/* The following are for controlling GCM */
|
| 1018 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "gcm_enable_critical_edge_motion", "gcm_enable_critical_edge_motion",
|
| 1019 |
|
|
1, 0, 0, &CG_GCM_enable_critical_edge_motion, NULL },
|
| 1020 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "gcm_enable_mvtc_optimization", "gcm_enable_mvtc_opt",
|
| 1021 |
|
|
1, 0, 0, &CG_GCM_enable_mvtc_optimization, NULL },
|
| 1022 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "gcm_enable_reduce_loop_count", "gcm_enable_reduce_loop_count",
|
| 1023 |
|
|
1, 0, 0, &CG_GCM_enable_reduce_loop_count, NULL },
|
| 1024 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "gcm_enable_break_dependence", "gcm_enable_break_dep",
|
| 1025 |
|
|
0, 0, 0, &CG_GCM_enable_break_dependence, NULL },
|
| 1026 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "gcm_licm", "",
|
| 1027 |
|
|
1, 0, 0, &CG_GCM_enable_licm, NULL},
|
| 1028 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "gcm_dce", "",
|
| 1029 |
|
|
1, 0, 0, &CG_GCM_enable_dce, NULL},
|
| 1030 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "gcm_rce", "",
|
| 1031 |
|
|
1, 0, 0, &CG_GCM_enable_rce, NULL},
|
| 1032 |
|
|
|
| 1033 |
|
|
// Turns of all region scheduling
|
| 1034 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"all_rgn_scheduler", "all_rgn_sched",
|
| 1035 |
|
|
0, 0, 0, &RGN_Enable_All_Scheduling, NULL },
|
| 1036 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"rgn_schedule", "rgn_sched",
|
| 1037 |
|
|
0, 0, 0, &CG_Enable_Regional_Global_Sched , NULL },
|
| 1038 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"rgn_local_schedule", "rgn_local_sched",
|
| 1039 |
|
|
0, 0, 0, &CG_Enable_Regional_Local_Sched , NULL },
|
| 1040 |
|
|
#endif
|
| 1041 |
|
|
#ifdef KEY
|
| 1042 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "local_fwd_scheduler", "local_fwd_sched",
|
| 1043 |
749 |
hucheng |
0, 0, 0, &LOCS_Fwd_Scheduling, &LOCS_Fwd_Scheduling_set },
|
| 1044 |
3577 |
leihuang |
{ OVK_UINT32, OV_INTERNAL, TRUE,"local_sched_algorithm", "local_sched_alg",
|
| 1045 |
|
|
0, 0, 2, &LOCS_Scheduling_Algorithm, &LOCS_Scheduling_Algorithm_set,
|
| 1046 |
|
|
"Select basic block instruction scheduling algorithm" },
|
| 1047 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"locs_best", "",
|
| 1048 |
|
|
0, 0, 0, &LOCS_Best, &LOCS_Best_set,
|
| 1049 |
|
|
"Select best schedule produced by different scheduling heuristics" },
|
| 1050 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "locs_shallow_depth", "",
|
| 1051 |
|
|
0, 0, 0, &LOCS_Shallow_Depth, &LOCS_Shallow_Depth_set },
|
| 1052 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "locs_balance_ready_types", "",
|
| 1053 |
|
|
0, 0, 0, &LOCS_Balance_Ready_Types, &LOCS_Balance_Ready_Types_set,
|
| 1054 |
|
|
"Enable heuristic to balance the number of int and fp OPs in the ready vector" },
|
| 1055 |
|
|
{ OVK_UINT32, OV_INTERNAL, TRUE,"locs_balance_ready_int", "",
|
| 1056 |
|
|
0, 0, 100, &LOCS_Balance_Ready_Int, &LOCS_Balance_Ready_Int_set,
|
| 1057 |
|
|
"The ready vector should contain no more than this percentage of int OPs" },
|
| 1058 |
|
|
{ OVK_UINT32, OV_INTERNAL, TRUE,"locs_balance_ready_fp", "",
|
| 1059 |
|
|
0, 0, 100, &LOCS_Balance_Ready_Fp, &LOCS_Balance_Ready_Fp_set,
|
| 1060 |
|
|
"The ready vector should contain no more than this percentage of fp OPs" },
|
| 1061 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "locs_balance_unsched_types", "",
|
| 1062 |
|
|
0, 0, 0, &LOCS_Balance_Unsched_Types, &LOCS_Balance_Unsched_Types_set,
|
| 1063 |
|
|
"Enable heuristic to balance the number of unscheduled int and fp OPs" },
|
| 1064 |
|
|
{ OVK_UINT32, OV_INTERNAL, TRUE,"locs_balance_unsched_int", "",
|
| 1065 |
|
|
0, 0, 100, &LOCS_Balance_Unsched_Int, &LOCS_Balance_Unsched_Int_set,
|
| 1066 |
|
|
"The unsched OPs should contain no more than this percentage of int OPs" },
|
| 1067 |
|
|
{ OVK_UINT32, OV_INTERNAL, TRUE,"locs_balance_unsched_fp", "",
|
| 1068 |
|
|
0, 0, 100, &LOCS_Balance_Unsched_Fp, &LOCS_Balance_Unsched_Fp_set,
|
| 1069 |
|
|
"The unsched OPs should contain no more than this percentage of fp OPs" },
|
| 1070 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "locs_reduce_prefetch", "",
|
| 1071 |
|
|
0, 0, 0, &LOCS_Reduce_Prefetch, &LOCS_Reduce_Prefetch_set,
|
| 1072 |
|
|
"Delete prefetches that cannot be scheduled in an unused issue slot" },
|
| 1073 |
749 |
hucheng |
#endif
|
| 1074 |
179 |
syang |
|
| 1075 |
|
|
// Turns of all scheduling (LOCS, HBS, GCM) for triaging.
|
| 1076 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"all_scheduler", "all_sched",
|
| 1077 |
|
|
0, 0, 0, &IGLS_Enable_All_Scheduling, NULL },
|
| 1078 |
749 |
hucheng |
|
| 1079 |
179 |
syang |
// Hyperblock formation (HB) options.
|
| 1080 |
|
|
|
| 1081 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "hb_formation", "",
|
| 1082 |
|
|
0,0,0, &HB_formation, NULL,
|
| 1083 |
|
|
"Turn on/off hyperblock formation [Default ON]"
|
| 1084 |
|
|
},
|
| 1085 |
3577 |
leihuang |
#ifdef KEY
|
| 1086 |
749 |
hucheng |
{ OVK_INT32, OV_INTERNAL, TRUE, "ifc_cutoff", "",
|
| 1087 |
|
|
4,0,100, &HB_if_conversion_cut_off, NULL,
|
| 1088 |
|
|
"What is the cut-off for doing If-conversion"
|
| 1089 |
|
|
},
|
| 1090 |
|
|
#endif
|
| 1091 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "hb_static_freq_heuristics", "",
|
| 1092 |
|
|
0,0,0, &HB_static_freq_heuristics, NULL,
|
| 1093 |
|
|
"Turn on/off hyperblock formation's use of different heuristics in the presence of static frequency analysis [Default ON]"
|
| 1094 |
|
|
},
|
| 1095 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "hb_max_blocks", "",
|
| 1096 |
|
|
4, 0, 100, &HB_max_blocks, NULL,
|
| 1097 |
|
|
"How many blocks allowed in a hyperblock [Default architecturally dependent]"
|
| 1098 |
|
|
},
|
| 1099 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "hb_min_blocks", "",
|
| 1100 |
|
|
4, 0, 32, &HB_min_blocks, NULL,
|
| 1101 |
|
|
"Minimum blocks allowed in a hyperblock [Default 2]"
|
| 1102 |
|
|
},
|
| 1103 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "hb_tail_duplication", "",
|
| 1104 |
|
|
0,0,0, &HB_allow_tail_duplication, NULL,
|
| 1105 |
|
|
"Flag to control tail-duplication when forming hyperblocks"
|
| 1106 |
|
|
},
|
| 1107 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE, "hb_max_sched_growth", "",
|
| 1108 |
|
|
0, 0, 0, &HB_max_sched_growth, NULL,
|
| 1109 |
|
|
"Multiplier for max increase in HB sched height [Default:3.0]"
|
| 1110 |
|
|
},
|
| 1111 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"hb_min_path_priority_ratio", "",
|
| 1112 |
|
|
0, 0, 0, &HB_min_path_priority_ratio, NULL,
|
| 1113 |
|
|
"Ratio to control relative size of paths included in hyperblock [Default: .1]"
|
| 1114 |
|
|
},
|
| 1115 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"hb_min_priority", "",
|
| 1116 |
|
|
0, 0, 0, &HB_min_priority, NULL,
|
| 1117 |
|
|
"Minimum priority allowed for a hyperblock [Default: .1]"
|
| 1118 |
|
|
},
|
| 1119 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"hb_call_hazard_multiplier", "",
|
| 1120 |
|
|
0, 0, 0, &HB_call_hazard_multiplier, NULL,
|
| 1121 |
|
|
"Factor by which to reduce path priority in presence of calls [Default: .25]"
|
| 1122 |
|
|
},
|
| 1123 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"hb_memory_hazard_multiplier", "",
|
| 1124 |
|
|
0, 0, 0, &HB_memory_hazard_multiplier, NULL,
|
| 1125 |
|
|
"Factor by which to reduce path priority in presence of unresolvable memory stores [Default: 1.0]"
|
| 1126 |
|
|
},
|
| 1127 |
|
|
{ OVK_NAME, OV_INTERNAL, TRUE,"hb_base_probability_contribution", "",
|
| 1128 |
|
|
0, 0, 0, &HB_base_probability_contribution, NULL,
|
| 1129 |
|
|
"Factor to ensure base contribution of path probability to priority [Default: 0.1]"
|
| 1130 |
|
|
},
|
| 1131 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "hb_require_alias", "",
|
| 1132 |
|
|
0,0,0, &HB_require_alias, NULL,
|
| 1133 |
|
|
"Turn on/off requirement that alias information be present for complex hyperblock formation [Default ON]"
|
| 1134 |
|
|
},
|
| 1135 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "hb_complex_non_loop", "",
|
| 1136 |
|
|
0,0,0, &HB_complex_non_loop, NULL,
|
| 1137 |
|
|
"Turn on/off complex hyperblock formation for non-loop regions [Default ON]"
|
| 1138 |
|
|
},
|
| 1139 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "hb_simple_ifc", "",
|
| 1140 |
|
|
0,0,0, &HB_simple_ifc, &HB_simple_ifc_set,
|
| 1141 |
|
|
"Turn on/off simple, always profitable hyperblock formation for non-loop regions [Default ON]"
|
| 1142 |
|
|
},
|
| 1143 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "hb_general_use_pq", "",
|
| 1144 |
|
|
0,0,0, &HB_general_use_pq, NULL,
|
| 1145 |
|
|
"Turn on/off using priority queue when following side paths in general region id for hyperblocks [Default OFF]"
|
| 1146 |
|
|
},
|
| 1147 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "hb_general_from_top", "",
|
| 1148 |
|
|
0,0,0, &HB_general_from_top, NULL,
|
| 1149 |
|
|
"Turn on/off following side paths from top of main path in general region id for hyperblocks [Default OFF]"
|
| 1150 |
|
|
},
|
| 1151 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "hb_exclude_calls", "",
|
| 1152 |
|
|
0,0,0, &HB_exclude_calls, NULL,
|
| 1153 |
|
|
"Disallow blocks with calls during hyperblock formation, temporary workaround before full support for predicate callee-register spilling is included [Default ON]"
|
| 1154 |
|
|
},
|
| 1155 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "hb_exclude_pgtns", "",
|
| 1156 |
|
|
0,0,0, &HB_exclude_pgtns, NULL,
|
| 1157 |
|
|
"Disallow forming hyperblocks if it consists of any global predicate TNs (PGTNS) [Default ON]"
|
| 1158 |
|
|
},
|
| 1159 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "hb_skip_hammocks", "",
|
| 1160 |
|
|
0,0,0, &HB_skip_hammocks, NULL,
|
| 1161 |
|
|
"Skip forming hyperblocks on hammocks, cause later pass will do them [Default ON]"
|
| 1162 |
|
|
},
|
| 1163 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "loop_force_ifc", "",
|
| 1164 |
|
|
0, 0, 2, &CG_LOOP_force_ifc, NULL },
|
| 1165 |
3577 |
leihuang |
#endif // ! TARG_NVISA
|
| 1166 |
179 |
syang |
|
| 1167 |
|
|
// Emit options
|
| 1168 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE,"longbranch_limit", "",
|
| 1169 |
|
|
DEFAULT_LONG_BRANCH_LIMIT, 0, INT32_MAX, &EMIT_Long_Branch_Limit, NULL },
|
| 1170 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"pjump_all", "pjump_all",
|
| 1171 |
|
|
0, 0, 0, &EMIT_pjump_all, NULL },
|
| 1172 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"use_cold_section", "use_cold_section",
|
| 1173 |
|
|
0, 0, 0, &EMIT_use_cold_section, NULL },
|
| 1174 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "emit_asm_dwarf", "",
|
| 1175 |
|
|
0,0,0, &CG_emit_asm_dwarf, NULL,
|
| 1176 |
|
|
"Turn on/off emission of dwarf data into .s file [Default OFF]"
|
| 1177 |
|
|
},
|
| 1178 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "emit_unwind_directives", "",
|
| 1179 |
|
|
0,0,0, &CG_emit_unwind_directives, NULL,
|
| 1180 |
|
|
"Turn on/off emission of unwind directives into .s file [Default OFF]"
|
| 1181 |
|
|
},
|
| 1182 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "emit_unwind_info", "",
|
| 1183 |
749 |
hucheng |
#ifdef TARG_X8664
|
| 1184 |
|
|
0,0,0, &CG_emit_unwind_info, &CG_emit_unwind_info_Set,
|
| 1185 |
|
|
#else
|
| 1186 |
179 |
syang |
0,0,0, &CG_emit_unwind_info, NULL,
|
| 1187 |
749 |
hucheng |
#endif
|
| 1188 |
179 |
syang |
"Turn on/off emission of unwind into .s/.o file [Default OFF]"
|
| 1189 |
|
|
},
|
| 1190 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"volatile_asm_stop", "",
|
| 1191 |
|
|
0, 0, 0, &EMIT_stop_bits_for_volatile_asm, NULL },
|
| 1192 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"emit_stop_bits_for_asm", "",
|
| 1193 |
|
|
0, 0, 0, &EMIT_stop_bits_for_asm, NULL },
|
| 1194 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"emit_explicit_bundles", "",
|
| 1195 |
|
|
0, 0, 0, &EMIT_explicit_bundles, NULL },
|
| 1196 |
758 |
laijx |
#ifdef TARG_IA64
|
| 1197 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE,"count_cycles_on_ski", "count_cycle",
|
| 1198 |
|
|
0, 0, 0, &EMIT_count_cycles, NULL,
|
| 1199 |
|
|
"Add stop bit to divide oversubscripted op groups. [Default off]"
|
| 1200 |
|
|
},
|
| 1201 |
758 |
laijx |
#endif
|
| 1202 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "enable_feedback", "",
|
| 1203 |
|
|
0, 0, 0, &CG_enable_feedback, NULL },
|
| 1204 |
749 |
hucheng |
{ OVK_BOOL, OV_INTERNAL, TRUE,"non_gas_syntax", "non_gas",
|
| 1205 |
|
|
0, 0, 0, &CG_emit_non_gas_syntax, NULL },
|
| 1206 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"inhibit_size_directive", "inhibit_size",
|
| 1207 |
|
|
0, 0, 0, &CG_inhibit_size_directive, NULL },
|
| 1208 |
|
|
#ifdef TARG_X8664
|
| 1209 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"use_movlpd", "",
|
| 1210 |
|
|
0, 0, 0, &CG_use_movlpd, NULL },
|
| 1211 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"use_setcc", "",
|
| 1212 |
|
|
0, 0, 0, &CG_use_setcc, NULL },
|
| 1213 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"short_form", "",
|
| 1214 |
|
|
0, 0, 0, &CG_use_short_form, NULL },
|
| 1215 |
3641 |
dreachem |
{ OVK_INT32, OV_VISIBLE, TRUE, "p2align", "p2align",
|
| 1216 |
|
|
2, 0, 2, &CG_p2align, NULL },
|
| 1217 |
3577 |
leihuang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "loop32", "loop32",
|
| 1218 |
|
|
0, 0, 0, &CG_loop32, NULL },
|
| 1219 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "compute_to", "compute_to",
|
| 1220 |
|
|
0, 0, 0, &CG_compute_to, NULL },
|
| 1221 |
749 |
hucheng |
{ OVK_UINT64, OV_INTERNAL, TRUE, "p2align_freq", "",
|
| 1222 |
|
|
0, 0, UINT64_MAX>>1, &CG_p2align_freq, NULL, "freq threshold for .p2align" },
|
| 1223 |
|
|
{ OVK_UINT32, OV_INTERNAL, TRUE,"p2align_max_skip_bytes", "",
|
| 1224 |
|
|
3, 0, 64, &CG_p2align_max_skip_bytes, NULL, "max skip bytes for .p2align" },
|
| 1225 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "use_xortozero", "",
|
| 1226 |
|
|
0, 0, 0, &CG_use_xortozero, &CG_use_xortozero_Set },
|
| 1227 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "use_test", "",
|
| 1228 |
|
|
0, 0, 0, &CG_use_test, NULL },
|
| 1229 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "fold_constimul", "",
|
| 1230 |
|
|
0, 0, 0, &CG_fold_constimul, NULL },
|
| 1231 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "use_incdec", "",
|
| 1232 |
|
|
0, 0, 0, &CG_use_incdec, NULL },
|
| 1233 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "fold_shiftadd", "",
|
| 1234 |
|
|
0, 0, 0, &CG_fold_shiftadd, NULL },
|
| 1235 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "use_prefetchnta", "",
|
| 1236 |
|
|
0, 0, 0, &CG_use_prefetchnta, NULL },
|
| 1237 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "idivbyconst_opt", "",
|
| 1238 |
|
|
0, 0, 0, &CG_idivbyconst_opt, NULL },
|
| 1239 |
|
|
{ OVK_UINT32, OV_INTERNAL, TRUE, "movnti", "",
|
| 1240 |
|
|
120, 0, UINT32_MAX>>1, &CG_movnti, NULL,
|
| 1241 |
|
|
"Use x86-64's movnti instead of mov when writing memory blocks of this size or larger (in KB)" },
|
| 1242 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "cloop", "",
|
| 1243 |
3577 |
leihuang |
0, 0, 0, &CG_LOOP_cloop, NULL },
|
| 1244 |
749 |
hucheng |
{ OVK_BOOL, OV_INTERNAL, TRUE,"use_lddqu", "",
|
| 1245 |
|
|
0, 0, 0, &CG_use_lddqu, NULL },
|
| 1246 |
3577 |
leihuang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "push_pop_int_saved_regs", "",
|
| 1247 |
|
|
0, 0, 0, &CG_push_pop_int_saved_regs, &CG_push_pop_int_saved_regs_Set },
|
| 1248 |
|
|
{ OVK_UINT32, OV_INTERNAL, TRUE,"ptr_load_use", "",
|
| 1249 |
|
|
4, 0, 64, &CG_ptr_load_use_latency, NULL,
|
| 1250 |
|
|
"extra latency between loading a pointer and its use"},
|
| 1251 |
749 |
hucheng |
#endif
|
| 1252 |
|
|
|
| 1253 |
|
|
#ifdef TARG_X8664
|
| 1254 |
3577 |
leihuang |
// x87
|
| 1255 |
749 |
hucheng |
{ OVK_BOOL, OV_INTERNAL, TRUE, "x87_store", "",
|
| 1256 |
|
|
0, 0, 0, &CG_x87_store, NULL,
|
| 1257 |
|
|
"Store x87 floating point variables to memory after each computation, in order to reduce the variable's precision from 80 bits to 32/64 bits. Default off."
|
| 1258 |
|
|
},
|
| 1259 |
|
|
#endif
|
| 1260 |
3577 |
leihuang |
#ifdef TARG_LOONGSON
|
| 1261 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "opt_useless_mem_op",
|
| 1262 |
|
|
"opt_useless_mem_op", 0, 0, 0, &CG_Enable_Opt_Mem_OP, NULL,
|
| 1263 |
|
|
"Remove useless st/ld op after EBO last time"
|
| 1264 |
|
|
},
|
| 1265 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "opt_useless_st_in_loop",
|
| 1266 |
|
|
"opt_useless_st_in_loop", 0, 0, 0, &CG_Enable_Opt_St_In_Loop, NULL,
|
| 1267 |
|
|
"Remove useless st/ld op after EBO last time"
|
| 1268 |
|
|
},
|
| 1269 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "enable_enhanced_lra",
|
| 1270 |
|
|
"enable_enhanced_lra", 0, 0, 0, &CG_Enable_Enhanced_LRA, NULL,
|
| 1271 |
|
|
"Enable use another algorithm for LRA"
|
| 1272 |
|
|
},
|
| 1273 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "enable_force_enhanced_lra",
|
| 1274 |
|
|
"enable_force_enhanced_lra", 0, 0, 0, &CG_Enable_Force_Enhanced_LRA, NULL,
|
| 1275 |
|
|
"force to do another algorithm for LRA"
|
| 1276 |
|
|
},
|
| 1277 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "enable_opt_ld_after_lra",
|
| 1278 |
|
|
"enable_opt_ld_after_lra", 0, 0, 0, &CG_Enable_Opt_Ld_After_LRA, NULL,
|
| 1279 |
|
|
"Enable opt ld after EBO"
|
| 1280 |
|
|
},
|
| 1281 |
|
|
{ OVK_INT32, OV_VISIBLE, TRUE, "enable_opt_entry_ra_reg",
|
| 1282 |
|
|
"enable_opt_entry_ra_reg", 0, 0, INT32_MAX, &CG_Enable_RA_OPT, NULL,
|
| 1283 |
|
|
"Enable opt copy of RA reg in entry"
|
| 1284 |
|
|
},
|
| 1285 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "enable_sorted_gra",
|
| 1286 |
|
|
"enable_sorted_gra", 0, 0, 0, &CG_Enable_Sorted_GRA, NULL,
|
| 1287 |
|
|
"Enable opt copy of RA reg in entry"
|
| 1288 |
|
|
},
|
| 1289 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "ftz",
|
| 1290 |
|
|
"ftz", 0, 0, 0, &CG_Enable_FTZ, NULL,
|
| 1291 |
|
|
"Enable masking flush-to-zero bit in Floating-exception control register"
|
| 1292 |
|
|
},
|
| 1293 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "nosched_div",
|
| 1294 |
|
|
"nosched_div", 0, 0, 0, &CG_NoSched_Divmfhimflo, NULL,
|
| 1295 |
|
|
"not schedule div and mfhi/mflo"
|
| 1296 |
|
|
},
|
| 1297 |
|
|
#endif
|
| 1298 |
|
|
#if defined(TARG_SL)
|
| 1299 |
|
|
{ OVK_BOOL , OV_INTERNAL, TRUE, "instr16","",
|
| 1300 |
|
|
0, 0, 0, &CG_Gen_16bit, NULL},
|
| 1301 |
|
|
{ OVK_BOOL , OV_INTERNAL, TRUE, "br16","",
|
| 1302 |
|
|
0, 0, 0, &CG_Enable_br16, NULL},
|
| 1303 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "pre_size", "",
|
| 1304 |
|
|
0, 0, 100, &CG_localsch_pre_size, NULL },
|
| 1305 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "dsp_thread", "",
|
| 1306 |
|
|
0, 0, 0, &CG_dsp_thread, NULL },
|
| 1307 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "qw_aligned", "",
|
| 1308 |
|
|
0, 0, 0, &CG_check_quadword, NULL},
|
| 1309 |
|
|
{ OVK_BOOL , OV_INTERNAL, TRUE, "rep_unpair16","",
|
| 1310 |
|
|
0, 0, 0, &CG_rep_unpaired16, NULL},
|
| 1311 |
|
|
{ OVK_BOOL , OV_INTERNAL, TRUE, "ignore_mem_alias", "",
|
| 1312 |
|
|
0, 0, 0, &CG_ignore_mem_alias, NULL},
|
| 1313 |
|
|
{OVK_BOOL , OV_INTERNAL, TRUE, "stack_layout","",
|
| 1314 |
|
|
0, 0, 0, &CG_stack_layout, NULL},
|
| 1315 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "isr", "",
|
| 1316 |
|
|
0, 0, 3, &CG_ISR, NULL},
|
| 1317 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "max_accreg", "",
|
| 1318 |
|
|
0, 0, 4, &CG_Max_Accreg, NULL},
|
| 1319 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "max_addreg", "",
|
| 1320 |
|
|
0, 0, 8, &CG_Max_Addreg, NULL},
|
| 1321 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "max_loopreg", "",
|
| 1322 |
|
|
0, 0, 4, &CG_zdl_enabled_level, NULL},
|
| 1323 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "round_spreg", "",
|
| 1324 |
|
|
0, 0, 0, &CG_round_spreg, NULL},
|
| 1325 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "check_packed", "",
|
| 1326 |
|
|
0, 0, 0, &CG_check_packed, NULL},
|
| 1327 |
|
|
{ OVK_BOOL , OV_INTERNAL, TRUE, "br_taken","",
|
| 1328 |
|
|
0, 0, 0, &CG_branch_taken, NULL},
|
| 1329 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "sl2", "",
|
| 1330 |
|
|
0, 0, 0, &CG_sl2, NULL },
|
| 1331 |
|
|
// sl2 specific peephole optimization
|
| 1332 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"combine_condmv", "combine_condmv",
|
| 1333 |
|
|
0, 0, 0, &CG_SL2_enable_combine_condmv, NULL },
|
| 1334 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"sl2peephole", "sl2peep",
|
| 1335 |
|
|
0, 0, 0, &CG_SL2_enable_peephole, NULL },
|
| 1336 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"sl2_macro", "sl2_macro",
|
| 1337 |
|
|
0, 0, 0, &CG_Enable_Macro_Instr_Combine, NULL },
|
| 1338 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"exp_v1buf", "exp_v1buf",
|
| 1339 |
|
|
0, 0, 0, &CG_SL2_enable_v1buf_expansion, NULL },
|
| 1340 |
|
|
#endif
|
| 1341 |
179 |
syang |
// Misc:
|
| 1342 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "gra_live_predicate_aware", "",
|
| 1343 |
|
|
0,0,0, &GRA_LIVE_Predicate_Aware, NULL,
|
| 1344 |
|
|
"Allow GRA_LIVE to be predicate-aware [Default ON]"
|
| 1345 |
|
|
},
|
| 1346 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "pqs_disable", "",
|
| 1347 |
|
|
0,0,0, &PQS_disabled, NULL,
|
| 1348 |
|
|
"Force PQS to be disabled [Default OFF]"
|
| 1349 |
|
|
},
|
| 1350 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE,"branch_taken_penalty", "",
|
| 1351 |
|
|
0, 0, INT32_MAX, &CGTARG_branch_taken_penalty,
|
| 1352 |
|
|
&CGTARG_branch_taken_penalty_overridden },
|
| 1353 |
3577 |
leihuang |
#if !defined(TARG_NVISA)
|
| 1354 |
179 |
syang |
{ OVK_BOOL, OV_INTERNAL, TRUE, "sched_est_calc_dep_graph", "",
|
| 1355 |
|
|
0, 0, 0, &CG_SCHED_EST_calc_dep_graph, NULL },
|
| 1356 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "sched_est_use_locs", "",
|
| 1357 |
|
|
0, 0, 0, &CG_SCHED_EST_use_locs, NULL },
|
| 1358 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "sched_est_call_cost", "",
|
| 1359 |
|
|
0, 0, INT32_MAX, &CG_SCHED_EST_call_cost, NULL },
|
| 1360 |
3577 |
leihuang |
#ifndef KEY
|
| 1361 |
749 |
hucheng |
{ OVK_BOOL, OV_INTERNAL, TRUE, "enable_feedback", "",
|
| 1362 |
|
|
0, 0, 0, &CG_enable_feedback, NULL },
|
| 1363 |
|
|
#endif
|
| 1364 |
179 |
syang |
{ OVK_INT32, OV_INTERNAL, TRUE, "mispredict_branch", "mispredict",
|
| 1365 |
|
|
0, 0, INT32_MAX, &CG_branch_mispredict_penalty, NULL },
|
| 1366 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "mispredict_factor", "",
|
| 1367 |
|
|
0, 0, INT32_MAX, &CG_branch_mispredict_factor, NULL },
|
| 1368 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"enable_thr", "",
|
| 1369 |
|
|
0, 0, 0, &CG_enable_thr, NULL },
|
| 1370 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"reverse_if_conversion", "",
|
| 1371 |
|
|
0, 0, 0, &CG_enable_reverse_if_conversion,
|
| 1372 |
|
|
&CG_enable_reverse_if_conversion_overridden },
|
| 1373 |
3577 |
leihuang |
#endif // ! TARG_NVISA
|
| 1374 |
179 |
syang |
{ OVK_INT32, OV_INTERNAL, TRUE,"body_ins_count_max", "",
|
| 1375 |
|
|
0, 0, INT32_MAX, &CG_maxinss, &CG_maxinss_overridden },
|
| 1376 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE,"body_blocks_count_max", "",
|
| 1377 |
|
|
0, 0, INT32_MAX, &CG_maxblocks, NULL },
|
| 1378 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"spec_imul_idiv", "",
|
| 1379 |
|
|
0, 0, 0, &CG_enable_spec_imul,
|
| 1380 |
|
|
&CG_enable_spec_imul_overridden },
|
| 1381 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"spec_idiv", "",
|
| 1382 |
|
|
0, 0, 0, &CG_enable_spec_idiv,
|
| 1383 |
|
|
&CG_enable_spec_idiv_overridden },
|
| 1384 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"spec_fdiv", "",
|
| 1385 |
|
|
0, 0, 0, &CG_enable_spec_fdiv,
|
| 1386 |
|
|
&CG_enable_spec_fdiv_overridden },
|
| 1387 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE, "spec_fsqrt", "",
|
| 1388 |
|
|
0, 0, 0, &CG_enable_spec_fsqrt,
|
| 1389 |
|
|
&CG_enable_spec_fsqrt_overridden },
|
| 1390 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"cond_defs", "cond_defs",
|
| 1391 |
|
|
0, 0, 0, &CG_cond_defs_allowed, NULL },
|
| 1392 |
|
|
|
| 1393 |
|
|
{ OVK_BOOL, OV_INTERNAL, TRUE,"rename", "",
|
| 1394 |
749 |
hucheng |
0, 0, 0, &CG_enable_rename, NULL },
|
| 1395 |
3577 |
leihuang |
|
| 1396 |
|
|
{ OVK_COUNT }
|
| 1397 |
179 |
syang |
};
|
| 1398 |
|
|
|
| 1399 |
3577 |
leihuang |
#if defined(TARG_IA64) || defined(TARG_LOONGSON)
|
| 1400 |
179 |
syang |
/* Ipfec related options: */
|
| 1401 |
|
|
//The &IPFEC_... flags are changed into &ORC_... flags.
|
| 1402 |
|
|
static OPTION_DESC Options_IPFEC[] = {
|
| 1403 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "rgn_form", "",
|
| 1404 |
|
|
0, 0, 0, &ORC_Enable_Region_Formation, NULL,
|
| 1405 |
|
|
"Use Ipfec region formation instead of original hyperblock formation"},
|
| 1406 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "rgn_deco", "",
|
| 1407 |
|
|
0, 0, 0, &ORC_Enable_Region_Decomposition, NULL,
|
| 1408 |
|
|
"Use Aurora region decomposition"},
|
| 1409 |
|
|
{ OVK_INT32, OV_VISIBLE, TRUE, "cut_num", "",
|
| 1410 |
|
|
0, 0, 92, &ORC_Stacked_Cut_Num, NULL,
|
| 1411 |
|
|
"Use cut the number of available stacked registers"},
|
| 1412 |
|
|
{ OVK_INT32, OV_VISIBLE, TRUE, "spill_num", "",
|
| 1413 |
|
|
0, 0, 30, &ORC_Stacked_Spill_Num, NULL,
|
| 1414 |
|
|
"Use tune stacked register usage"},
|
| 1415 |
|
|
{ OVK_INT32, OV_VISIBLE, TRUE, "rgn_dup", "",
|
| 1416 |
|
|
0, 0, 0, &ORC_Enable_Tail_Duplication, NULL,
|
| 1417 |
|
|
"Use Aurora region tail duplication"},
|
| 1418 |
|
|
{ OVK_INT32, OV_VISIBLE, TRUE, "rgn_exit", "",
|
| 1419 |
|
|
0, 0, 0, &ORC_Enable_Exit_Probability, NULL,
|
| 1420 |
|
|
"Use Aurora region exit probability requirement"},
|
| 1421 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "if_conv", "",
|
| 1422 |
|
|
0, 0, 0, &ORC_Enable_If_Conversion, NULL,
|
| 1423 |
|
|
"Use Ipfec if-convertor instead of original hyperblock formation" },
|
| 1424 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "force_if_conv", "",
|
| 1425 |
|
|
0, 0, 0, &ORC_Force_If_Conv, NULL,
|
| 1426 |
|
|
"Use Ipfec if-convertor without profitablity consideration" },
|
| 1427 |
3577 |
leihuang |
#ifndef TARG_LOONGSON
|
| 1428 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "relaxed_if_conv", "",
|
| 1429 |
|
|
0, 0, 0, &ORC_Relaxed_If_Conv, NULL,
|
| 1430 |
|
|
"Use Ipfec if-convertor with relaxed profability consideration" },
|
| 1431 |
|
|
#endif
|
| 1432 |
179 |
syang |
{ OVK_BOOL, OV_VISIBLE, TRUE, "combine_exit", "",
|
| 1433 |
|
|
0, 0, 0, &ORC_Combine_Exit, NULL,
|
| 1434 |
|
|
"Enable the combine exits with identical targets" },
|
| 1435 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "force_para_comp_gen", "",
|
| 1436 |
|
|
0, 0, 0, &ORC_Force_Para_Comp_Gen, NULL,
|
| 1437 |
|
|
"Generate parallel compare without profitablity consideration" },
|
| 1438 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "para_comp_gen", "",
|
| 1439 |
|
|
0, 0, 0, &ORC_Para_Comp_Gen, NULL,
|
| 1440 |
|
|
"generate parallel compare" },
|
| 1441 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "disable_merge_bb", "",
|
| 1442 |
|
|
0, 0, 0, &ORC_Disable_Merge_BB, NULL,
|
| 1443 |
|
|
"Use if-convertor without merge basic blocks" },
|
| 1444 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "prdb", "",
|
| 1445 |
|
|
0, 0, 0, &ORC_Enable_PRDB, NULL,
|
| 1446 |
|
|
"Use Ipfec PRDB instead of original one" },
|
| 1447 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "bb_verify", "",
|
| 1448 |
|
|
0, 0, 0, &ORC_Enable_BB_Verify, NULL,
|
| 1449 |
|
|
"Use Ipfec BB_Verify to check bb attributes" },
|
| 1450 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "cflow_after_schedule", "",
|
| 1451 |
|
|
0, 0, 0, &ORC_Enable_Opt_after_schedule, NULL,
|
| 1452 |
|
|
"Use Ipfec cflow_after_schedule to delete empty BBs" },
|
| 1453 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "LICM", "",
|
| 1454 |
|
|
1, 0, 0, &ORC_Enable_LICM, NULL,
|
| 1455 |
|
|
"Loop Invariant Code Motion" },
|
| 1456 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "pre_glos", "",
|
| 1457 |
|
|
0, 0, 0, &ORC_Enable_Prepass_GLOS, NULL,
|
| 1458 |
|
|
"Use Ipfec pre-pass global scheduler" },
|
| 1459 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "post_glos", "",
|
| 1460 |
|
|
0, 0, 0, &ORC_Enable_Postpass_GLOS, NULL,
|
| 1461 |
|
|
"Use Ipfec post-pass global scheduler" },
|
| 1462 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "pre_locs", "",
|
| 1463 |
|
|
0, 0, 0, &ORC_Enable_Prepass_LOCS, NULL,
|
| 1464 |
|
|
"Use Ipfec pre-pass local scheduler" },
|
| 1465 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "post_locs", "",
|
| 1466 |
|
|
0, 0, 0, &ORC_Enable_Postpass_LOCS, NULL,
|
| 1467 |
|
|
"Use Ipfec post-pass local scheduler" },
|
| 1468 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "spec", "",
|
| 1469 |
|
|
0, 0, 0, &ORC_Enable_Speculation, NULL,
|
| 1470 |
|
|
"Enable speculation" },
|
| 1471 |
3577 |
leihuang |
#ifndef TARG_LOONGSON
|
| 1472 |
535 |
syang |
{ OVK_BOOL, OV_VISIBLE, TRUE, "fpld_spec", "",
|
| 1473 |
|
|
0, 0, 0, &ORC_Enable_FP_Ld_Speculation, NULL,
|
| 1474 |
|
|
"Enable floating-point load speculation" },
|
| 1475 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "dsra", "",
|
| 1476 |
|
|
0, 0, 0, &ORC_Enable_Data_Spec_Res_Aware, NULL,
|
| 1477 |
|
|
"Enable data speculation resource awareness" },
|
| 1478 |
3577 |
leihuang |
#endif
|
| 1479 |
179 |
syang |
{ OVK_BOOL, OV_VISIBLE, TRUE, "data_spec", "",
|
| 1480 |
|
|
0, 0, 0, &ORC_Enable_Data_Speculation, NULL,
|
| 1481 |
|
|
"Enable data speculation" },
|
| 1482 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "cntl_spec", "",
|
| 1483 |
|
|
0, 0, 0, &ORC_Enable_Cntl_Speculation, NULL,
|
| 1484 |
|
|
"Enable control speculation" },
|
| 1485 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "cmpsd_tmplt", "",
|
| 1486 |
|
|
0, 0, 0, &ORC_Enable_Compressed_Template, NULL,
|
| 1487 |
|
|
"Turn on using of Compressed Template" },
|
| 1488 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "stress_spec", "",
|
| 1489 |
|
|
0, 0, 0, &ORC_Stress_Spec, NULL,
|
| 1490 |
|
|
"Stress speculation, for debugging purpose" },
|
| 1491 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "glos_reg_pressure_aware", "",
|
| 1492 |
|
|
1, 0, 0, &ORC_Glos_Reg_Pressure_Aware, NULL,
|
| 1493 |
|
|
"Global code motion reg pressure awareness" },
|
| 1494 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "glos_split_entry_bb", "",
|
| 1495 |
|
|
1, 0, 0, &ORC_Glos_Split_Entry_BB, NULL,
|
| 1496 |
|
|
"global code motion split entry block for larger schedule scope" },
|
| 1497 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "glos_split_exit_bb", "",
|
| 1498 |
|
|
1, 0, 0, &ORC_Glos_Split_Exit_BB, NULL,
|
| 1499 |
|
|
"global code motion split exit block for larger schedule scope" },
|
| 1500 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "glos_enable_p_ready_code_motion", "",
|
| 1501 |
|
|
1, 0, 0, &ORC_Glos_Enable_P_Ready_Code_Motion, NULL,
|
| 1502 |
|
|
"Enable P-ready code motion" },
|
| 1503 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "glos_code_motion_across_nested_rgn", "",
|
| 1504 |
|
|
1, 0, 0, &ORC_Glos_Code_Motion_Across_Nested_Rgn, NULL,
|
| 1505 |
|
|
"Enable code motion across nested region" },
|
| 1506 |
|
|
{OVK_BOOL, OV_VISIBLE, TRUE, "glos_enable_cntl_spec_if_converted_code", "",
|
| 1507 |
|
|
1, 0, 0, &ORC_Glos_Enable_Cntl_Spec_If_Converted_Code, NULL,
|
| 1508 |
|
|
"Enable control speculation of if-converted code"},
|
| 1509 |
|
|
{OVK_BOOL, OV_VISIBLE, TRUE, "glos_enable_renaming", "",
|
| 1510 |
|
|
1, 0, 0, &ORC_Glos_Enable_Renaming, NULL,
|
| 1511 |
|
|
"glos_enable_renaming"},
|
| 1512 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "adjust_variable_latency", "",
|
| 1513 |
|
|
1, 0, 0, &ORC_Adjust_Variable_Latency, NULL,
|
| 1514 |
|
|
"Adjust Variable Latency During Code motion" },
|
| 1515 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "glos_motion_across_calls", "",
|
| 1516 |
|
|
0, 0, 0, &ORC_Glos_Motion_Across_Calls, NULL,
|
| 1517 |
|
|
"Enable global code motion across calls" },
|
| 1518 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "pre_bundling", "",
|
| 1519 |
|
|
0, 0, 0, &ORC_Enable_Pre_Bundling, NULL,
|
| 1520 |
|
|
"Turn on bundling on pre-global scheduling" },
|
| 1521 |
|
|
{ OVK_INT32, OV_VISIBLE, TRUE, "stride_prefetch", "",
|
| 1522 |
|
|
3, 0, 3, &ORC_Enable_Stride_Prefetch, NULL,
|
| 1523 |
|
|
"Turn on stride prefetching" },
|
| 1524 |
|
|
{ OVK_NAME, OV_VISIBLE, TRUE, "edge_profile_instr", "",
|
| 1525 |
|
|
0, 0, 0, &Instru_File_Name, &ORC_Enable_Edge_Profile,
|
| 1526 |
|
|
"Enable edge profile" },
|
| 1527 |
|
|
{ OVK_NAME, OV_VISIBLE, TRUE, "value_profile_instr", "",
|
| 1528 |
|
|
0, 0, 0, &Value_Instru_File_Name,&ORC_Enable_Value_Profile,
|
| 1529 |
|
|
"Enable value profile" },
|
| 1530 |
|
|
{ OVK_NAME, OV_VISIBLE, TRUE, "stride_profile_instr", "",
|
| 1531 |
|
|
0, 0, 0, &Stride_Instru_File_Name,&ORC_Enable_Stride_Profile,
|
| 1532 |
|
|
"Enable value profile" },
|
| 1533 |
|
|
{ OVK_NAME, OV_VISIBLE, TRUE, "edge_profile_annot", "",
|
| 1534 |
|
|
0, 0, 0, &Fb_File_Name, &ORC_Enable_Edge_Profile_Annot,
|
| 1535 |
|
|
"Enable edge profile" },
|
| 1536 |
|
|
{ OVK_NAME, OV_VISIBLE, TRUE, "value_profile_annot", "",
|
| 1537 |
|
|
0, 0, 0, &Value_Fb_File_Name,&ORC_Enable_Value_Profile_Annot,
|
| 1538 |
|
|
"Enable value profile" },
|
| 1539 |
|
|
{ OVK_NAME, OV_VISIBLE, TRUE, "stride_profile_annot", "",
|
| 1540 |
|
|
0, 0, 0, &Stride_Fb_File_Name,&ORC_Enable_Stride_Profile_Annot,
|
| 1541 |
|
|
"Enable value profile" },
|
| 1542 |
|
|
{ OVK_NAME, OV_VISIBLE, TRUE, "safe_cntl_spec_prob", "",
|
| 1543 |
|
|
0, 0, 0, &ORC_safe_cntl_spec_prob, &ORC_Enable_Cntl_Speculation,
|
| 1544 |
|
|
"Enable control speculation"},
|
| 1545 |
|
|
{ OVK_NAME, OV_VISIBLE, TRUE, "unsafe_cntl_spec_prob", "",
|
| 1546 |
|
|
0, 0, 0, &ORC_unsafe_cntl_spec_prob, &ORC_Enable_Cntl_Speculation,
|
| 1547 |
|
|
"Enable control speculation"},
|
| 1548 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "value_instr_range", "",
|
| 1549 |
|
|
0, 0, INT32_MAX, &Value_Instr_Range, NULL },
|
| 1550 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "value_instr_pu_id", "",
|
| 1551 |
|
|
0, 0, INT32_MAX, &Value_Instr_Pu_Id, NULL },
|
| 1552 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "use_random_prob", "",
|
| 1553 |
|
|
0, 0, 0, &ORC_Enable_Random_Prob, NULL,
|
| 1554 |
|
|
"Enable value profile" },
|
| 1555 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "chk_fail", "",
|
| 1556 |
|
|
0, 0, 0, &ORC_Force_CHK_Fail, NULL,
|
| 1557 |
|
|
"Force every chk fail" },
|
| 1558 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "cascade", "",
|
| 1559 |
|
|
0, 0, 0, &ORC_Enable_Cascade, NULL,
|
| 1560 |
|
|
"Enable cascaded speculation" },
|
| 1561 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "hold_uses", "",
|
| 1562 |
|
|
0, 0, 0, &ORC_Hold_Uses, NULL,
|
| 1563 |
|
|
"Hold the uses of speculative load" },
|
| 1564 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "profitability", "",
|
| 1565 |
|
|
0, 0, 0, &ORC_Profitability, NULL,
|
| 1566 |
|
|
"Adjust all ipfec flags considering profitability" },
|
| 1567 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "chk_compact", "",
|
| 1568 |
|
|
0, 0, 0, &ORC_Chk_Compact, NULL,
|
| 1569 |
|
|
"Whether combine chk split BB" },
|
| 1570 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "load_safety", "",
|
| 1571 |
|
|
0, 0, 0, &ORC_Enable_Safety_Load, NULL,
|
| 1572 |
|
|
"Identify safety load" },
|
| 1573 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "multi_branch", "",
|
| 1574 |
|
|
0, 0, 0, &ORC_Enable_Multi_Branch, NULL,
|
| 1575 |
|
|
"Enable Multiple branch" },
|
| 1576 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "pre_multi_branch", "",
|
| 1577 |
|
|
0, 0, 0, &ORC_Enable_Pre_Multi_Branch, NULL,
|
| 1578 |
|
|
"Enable Previous Multiple branch" },
|
| 1579 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "post_multi_branch", "",
|
| 1580 |
|
|
0, 0, 0, &ORC_Enable_Post_Multi_Branch, NULL,
|
| 1581 |
|
|
"Enable Post Multiple branch" },
|
| 1582 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "cache_ana", "",
|
| 1583 |
|
|
0, 0, 0, &ORC_Enable_Cache_Analysis, NULL,
|
| 1584 |
|
|
"Enable Cache conflict Analysis" },
|
| 1585 |
|
|
/*
|
| 1586 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "insert_unat", "",
|
| 1587 |
|
|
0, 0, 0, &ORC_Enable_Insert_UNAT, NULL,
|
| 1588 |
|
|
"Whether Insert unat code" },
|
| 1589 |
|
|
*/
|
| 1590 |
|
|
|
| 1591 |
|
|
// Flags for research experiments:
|
| 1592 |
|
|
{ OVK_INT32, OV_INTERNAL, TRUE, "care_machine_level", "care_m",
|
| 1593 |
|
|
0, 0, INT32_MAX, &ORC_sched_care_machine, NULL },
|
| 1594 |
|
|
|
| 1595 |
|
|
|
| 1596 |
|
|
{ OVK_COUNT } /* List terminator -- must be last */
|
| 1597 |
|
|
};
|
| 1598 |
|
|
/* Cycle Counting related options: */
|
| 1599 |
|
|
static OPTION_DESC Options_CYCLE[] = {
|
| 1600 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "cpe", "",
|
| 1601 |
|
|
0, 0, 0, &Cycle_PU_Enable, NULL,
|
| 1602 |
|
|
"Cycle count enable" },
|
| 1603 |
|
|
{ OVK_NAME, OV_VISIBLE, TRUE, "cbe", "",
|
| 1604 |
|
|
0, 0, 0, &Cycle_String, &Cycle_BB_Enable,
|
| 1605 |
|
|
"Cycle count enable" },
|
| 1606 |
|
|
{ OVK_COUNT } /* List terminator -- must be last */
|
| 1607 |
|
|
};
|
| 1608 |
|
|
|
| 1609 |
|
|
/* VT (Visualization Tool) related options: */
|
| 1610 |
|
|
static OPTION_DESC Options_VT[] = {
|
| 1611 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "bb_op", "",
|
| 1612 |
|
|
0, 0, 0, &VT_Enable_BB_OP, NULL,
|
| 1613 |
|
|
"Enable a bb's op visualization"},
|
| 1614 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "glbl_cfg", "",
|
| 1615 |
|
|
0, 0, 0, &VT_Enable_Global_CFG, NULL,
|
| 1616 |
|
|
"Enable global control flow graph visualization"},
|
| 1617 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "rgnl_cfg", "",
|
| 1618 |
|
|
0, 0, 0, &VT_Enable_Regional_CFG, NULL,
|
| 1619 |
|
|
"Enable regional control flow graph visualization"},
|
| 1620 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "rgn_tree", "",
|
| 1621 |
|
|
0, 0, 0, &VT_Enable_Region_Tree, NULL,
|
| 1622 |
|
|
"Enable region tree visualization"},
|
| 1623 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "bb_dag", "",
|
| 1624 |
|
|
0, 0, 0, &VT_Enable_BB_DAG, NULL,
|
| 1625 |
|
|
"Enable bb dependence graph visualization"},
|
| 1626 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "rgnl_dag", "",
|
| 1627 |
|
|
0, 0, 0, &VT_Enable_Regional_DAG, NULL,
|
| 1628 |
|
|
"Enable regional dependence graph visualization"},
|
| 1629 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "ptn_gph", "",
|
| 1630 |
|
|
0, 0, 0, &VT_Enable_Partition_Graph, NULL,
|
| 1631 |
|
|
"Enable partition graph visualization"},
|
| 1632 |
|
|
|
| 1633 |
|
|
// options about features about the visualization graph
|
| 1634 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "cfg_label", "",
|
| 1635 |
|
|
0, 0, 0, &VT_Enable_CFG_Label, NULL,
|
| 1636 |
|
|
"Enable edge label when visualizing control flow graph"},
|
| 1637 |
|
|
{ OVK_BOOL, OV_VISIBLE, TRUE, "dag_br", "",
|
| 1638 |
|
|
0, 0, 0, &VT_Enable_DAG_BR, NULL,
|
| 1639 |
|
|
"Enable PREBR and POSTBR dependencies when visualizing dependence graph"},
|
| 1640 |
|
|
|
| 1641 |
|
|
{ OVK_COUNT } /* List terminator -- must be last */
|
| 1642 |
|
|
};
|
| 1643 |
|
|
|
| 1644 |
|
|
/*Relation options about skip optimization*/
|
| 1645 |
|
|
static OPTION_DESC Options_SKIP[] = {
|
| 1646 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "locs_skip_bb_before", "locs_skip_bb_b",
|
| 1647 |
|
|
0, 0, 4096, &raw_locs_skip_bb, NULL,
|
| 1648 |
|
|
"" },
|
| 1649 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "locs_skip_bb_after", "locs_skip_bb_a",
|
| 1650 |
|
|
0, 0, 4096, &raw_locs_skip_bb, NULL,
|
| 1651 |
|
|
"" },
|
| 1652 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "locs_skip_bb_equal", "locs_skip_bb_e",
|
| 1653 |
|
|
0, 0, 4096, &raw_locs_skip_bb, NULL,
|
| 1654 |
|
|
"" },
|
| 1655 |
522 |
syang |
{ OVK_LIST, OV_SHY, FALSE, "glos_skip_bb_before", "glos_skip_bb_b",
|
| 1656 |
|
|
0, 0, 4096, &raw_glos_skip_bb, NULL,
|
| 1657 |
|
|
"" },
|
| 1658 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "glos_skip_bb_after", "glos_skip_bb_a",
|
| 1659 |
|
|
0, 0, 4096, &raw_glos_skip_bb, NULL,
|
| 1660 |
|
|
"" },
|
| 1661 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "glos_skip_bb_equal", "glos_skip_bb_e",
|
| 1662 |
|
|
0, 0, 4096, &raw_glos_skip_bb, NULL,
|
| 1663 |
|
|
"" },
|
| 1664 |
179 |
syang |
{ OVK_LIST, OV_SHY, FALSE, "if_conv_skip_rgn_before", "if_conv_skip_rgn_b",
|
| 1665 |
|
|
0, 0, 4096, &raw_if_conv_skip_rgn, NULL,
|
| 1666 |
|
|
"" },
|
| 1667 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "if_conv_skip_rgn_after", "if_conv_skip_rgn_a",
|
| 1668 |
|
|
0, 0, 4096, &raw_if_conv_skip_rgn, NULL,
|
| 1669 |
|
|
"" },
|
| 1670 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "if_conv_skip_rgn_equal", "if_conv_skip_rgn_e",
|
| 1671 |
|
|
0, 0, 4096, &raw_if_conv_skip_rgn, NULL,
|
| 1672 |
|
|
"" },
|
| 1673 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "if_conv_skip_area_after", "if_conv_skip_area_a",
|
| 1674 |
|
|
0, 0, 4096, &raw_if_conv_skip_area, NULL,
|
| 1675 |
|
|
"" },
|
| 1676 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "if_conv_skip_area_before", "if_conv_skip_area_b",
|
| 1677 |
|
|
0, 0, 4096, &raw_if_conv_skip_area, NULL,
|
| 1678 |
|
|
"" },
|
| 1679 |
|
|
{OVK_LIST, OV_SHY, FALSE, "if_conv_skip_area_equal", "if_conv_skip_area_e",
|
| 1680 |
|
|
0, 0, 4096, &raw_if_conv_skip_area, NULL,
|
| 1681 |
|
|
"" },
|
| 1682 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "glos_skip_rgn_before", "glos_skip_rgn_b",
|
| 1683 |
|
|
0, 0, 4096, &raw_glos_skip_rgn, NULL,
|
| 1684 |
|
|
"" },
|
| 1685 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "glos_skip_rgn_after", "glos_skip_rgn_a",
|
| 1686 |
|
|
0, 0, 4096, &raw_glos_skip_rgn, NULL,
|
| 1687 |
|
|
"" },
|
| 1688 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "glos_skip_rgn_equal", "glos_skip_rgn_e",
|
| 1689 |
|
|
0, 0, 4096, &raw_glos_skip_rgn, NULL,
|
| 1690 |
|
|
"" },
|
| 1691 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "spec_skip_rgn_before", "spec_skip_rgn_b",
|
| 1692 |
|
|
0, 0, 4096, &raw_spec_skip_rgn, NULL,
|
| 1693 |
|
|
"" },
|
| 1694 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "spec_skip_rgn_after", "spec_skip_rgn_a",
|
| 1695 |
|
|
0, 0, 4096, &raw_spec_skip_rgn, NULL,
|
| 1696 |
|
|
"" },
|
| 1697 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "spec_skip_rgn_equal", "spec_skip_rgn_e",
|
| 1698 |
|
|
0, 0, 4096, &raw_spec_skip_rgn, NULL,
|
| 1699 |
|
|
"" },
|
| 1700 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "spec_skip_bb_before", "spec_skip_bb_b",
|
| 1701 |
|
|
0, 0, 4096, &raw_spec_skip_bb, NULL,
|
| 1702 |
|
|
"" },
|
| 1703 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "spec_skip_bb_after", "spec_skip_bb_a",
|
| 1704 |
|
|
0, 0, 4096, &raw_spec_skip_bb, NULL,
|
| 1705 |
|
|
"" },
|
| 1706 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "spec_skip_bb_equal", "spec_skip_bb_e",
|
| 1707 |
|
|
0, 0, 4096, &raw_spec_skip_bb, NULL,
|
| 1708 |
|
|
"" },
|
| 1709 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "msched_skip_bb_before", "msched_skip_bb_b",
|
| 1710 |
|
|
0, 0, 4096, &raw_msched_skip_bb, NULL,
|
| 1711 |
|
|
"" },
|
| 1712 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "msched_skip_bb_after", "msched_skip_bb_a",
|
| 1713 |
|
|
0, 0, 4096, &raw_msched_skip_bb, NULL,
|
| 1714 |
|
|
"" },
|
| 1715 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "msched_skip_bb_equal", "msched_skip_bb_e",
|
| 1716 |
|
|
0, 0, 4096, &raw_msched_skip_bb, NULL,
|
| 1717 |
|
|
"" },
|
| 1718 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "msched_skip_rgn_before", "msched_skip_rgn_b",
|
| 1719 |
|
|
0, 0, 4096, &raw_msched_skip_rgn, NULL,
|
| 1720 |
|
|
"" },
|
| 1721 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "msched_skip_rgn_after", "msched_skip_rgn_a",
|
| 1722 |
|
|
0, 0, 4096, &raw_msched_skip_rgn, NULL,
|
| 1723 |
|
|
"" },
|
| 1724 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "msched_skip_rgn_equal", "msched_skip_rgn_e",
|
| 1725 |
|
|
0, 0, 4096, &raw_msched_skip_rgn, NULL,
|
| 1726 |
|
|
"" },
|
| 1727 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "spec_skip_PU_before", "spec_skip_PU_b",
|
| 1728 |
|
|
0, 0, 4096, &raw_spec_skip_PU, NULL,
|
| 1729 |
|
|
"" },
|
| 1730 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "spec_skip_PU_after", "spec_skip_PU_a",
|
| 1731 |
|
|
0, 0, 4096, &raw_spec_skip_PU, NULL,
|
| 1732 |
|
|
"" },
|
| 1733 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "spec_skip_PU_equal", "spec_skip_PU_e",
|
| 1734 |
|
|
0, 0, 4096, &raw_spec_skip_PU, NULL,
|
| 1735 |
|
|
"" },
|
| 1736 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "if_conv_skip_PU_before", "if_conv_skip_PU_b",
|
| 1737 |
|
|
0, 0, 4096, &raw_if_conv_skip_PU, NULL,
|
| 1738 |
|
|
"" },
|
| 1739 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "if_conv_skip_PU_after", "if_conv_skip_PU_a",
|
| 1740 |
|
|
0, 0, 4096, &raw_if_conv_skip_PU, NULL,
|
| 1741 |
|
|
"" },
|
| 1742 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "if_conv_skip_PU_equal", "if_conv_skip_PU_e",
|
| 1743 |
|
|
0, 0, 4096, &raw_if_conv_skip_PU, NULL,
|
| 1744 |
|
|
"" },
|
| 1745 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "PRDB_skip_PU_before", "PRDB_skip_PU_b",
|
| 1746 |
|
|
0, 0, 4096, &raw_PRDB_skip_PU, NULL,
|
| 1747 |
|
|
"" },
|
| 1748 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "PRDB_skip_PU_after", "PRDB_skip_PU_a",
|
| 1749 |
|
|
0, 0, 4096, &raw_PRDB_skip_PU, NULL,
|
| 1750 |
|
|
"" },
|
| 1751 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "PRDB_skip_PU_equal", "PRDB_skip_PU_e",
|
| 1752 |
|
|
0, 0, 4096, &raw_PRDB_skip_PU, NULL,
|
| 1753 |
|
|
"" },
|
| 1754 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "pre_glos_skip_PU_before", "pre_glos_skip_PU_b",
|
| 1755 |
|
|
0, 0, 4096, &raw_pre_glos_skip_PU, NULL,
|
| 1756 |
|
|
"" },
|
| 1757 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "pre_glos_skip_PU_after", "pre_glos_skip_PU_a",
|
| 1758 |
|
|
0, 0, 4096, &raw_pre_glos_skip_PU, NULL,
|
| 1759 |
|
|
"" },
|
| 1760 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "pre_glos_skip_PU_equal", "pre_glos_skip_PU_e",
|
| 1761 |
|
|
0, 0, 4096, &raw_pre_glos_skip_PU, NULL,
|
| 1762 |
|
|
"" },
|
| 1763 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "post_locs_skip_PU_before", "post_locs_skip_PU_b",
|
| 1764 |
|
|
0, 0, 4096, &raw_post_locs_skip_PU, NULL,
|
| 1765 |
|
|
"" },
|
| 1766 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "post_locs_skip_PU_after", "post_locs_skip_PU_a",
|
| 1767 |
|
|
0, 0, 4096, &raw_post_locs_skip_PU, NULL,
|
| 1768 |
|
|
"" },
|
| 1769 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "post_locs_skip_PU_equal", "post_locs_skip_PU_e",
|
| 1770 |
|
|
0, 0, 4096, &raw_post_locs_skip_PU, NULL,
|
| 1771 |
|
|
"" },
|
| 1772 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "spec_skip_op_before", "spec_skip_op_b",
|
| 1773 |
|
|
0, 0, 4096, &raw_spec_skip_op, NULL,
|
| 1774 |
|
|
"" },
|
| 1775 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "spec_skip_op_after", "spec_skip_op_a",
|
| 1776 |
|
|
0, 0, 4096, &raw_spec_skip_op, NULL,
|
| 1777 |
|
|
"" },
|
| 1778 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "spec_skip_op_equal", "spec_skip_op_e",
|
| 1779 |
|
|
0, 0, 4096, &raw_spec_skip_op, NULL,
|
| 1780 |
|
|
"" },
|
| 1781 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "mlbr_skip_bb_before", "mlbr_skip_bb_b",
|
| 1782 |
|
|
0, 0, 4096, &raw_mlbr_skip_bb, NULL,
|
| 1783 |
|
|
"" },
|
| 1784 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "mlbr_skip_bb_after", "mlbr_skip_bb_a",
|
| 1785 |
|
|
0, 0, 4096, &raw_mlbr_skip_bb, NULL,
|
| 1786 |
|
|
"" },
|
| 1787 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "mlbr_skip_bb_equal", "mlbr_skip_bb_e",
|
| 1788 |
|
|
0, 0, 4096, &raw_mlbr_skip_bb, NULL,
|
| 1789 |
|
|
"" },
|
| 1790 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "glos_rename_skip_bb_before", "glos_rename_skip_bb_b",
|
| 1791 |
|
|
0, 0, 4096, &raw_glos_rename_skip_bb, NULL,
|
| 1792 |
|
|
"" },
|
| 1793 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "glos_rename_skip_bb_after", "glos_rename_skip_bb_a",
|
| 1794 |
|
|
0, 0, 4096, &raw_glos_rename_skip_bb, NULL,
|
| 1795 |
|
|
"" },
|
| 1796 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "glos_rename_skip_bb_equal", "glos_rename_skip_bb_e",
|
| 1797 |
|
|
0, 0, 4096, &raw_glos_rename_skip_bb, NULL,
|
| 1798 |
|
|
"" },
|
| 1799 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "glos_rename_skip_op_before", "glos_rename_skip_op_b",
|
| 1800 |
|
|
0, 0, 4096, &raw_glos_rename_skip_op, NULL,
|
| 1801 |
|
|
"" },
|
| 1802 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "glos_rename_skip_op_after", "glos_rename_skip_op_a",
|
| 1803 |
|
|
0, 0, 4096, &raw_glos_rename_skip_op, NULL,
|
| 1804 |
|
|
"" },
|
| 1805 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "glos_rename_skip_op_equal", "glos_rename_skip_op_e",
|
| 1806 |
|
|
0, 0, 4096, &raw_glos_rename_skip_op, NULL,
|
| 1807 |
|
|
"" },
|
| 1808 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "latency2_before", "latency2_b",
|
| 1809 |
|
|
0, 0, 4096, &raw_latency2, NULL,
|
| 1810 |
|
|
"" },
|
| 1811 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "latency2_after", "latency2_a",
|
| 1812 |
|
|
0, 0, 4096, &raw_latency2, NULL,
|
| 1813 |
|
|
"" },
|
| 1814 |
|
|
{ OVK_LIST, OV_SHY, FALSE, "latency2_equal", "latency2_e",
|
| 1815 |
|
|
0, 0, 4096, &raw_latency2, NULL,
|
| 1816 |
|
|
"" },
|
| 1817 |
|
|
|
| 1818 |
|
|
{ OVK_COUNT } /* List terminator -- must be last */
|
| 1819 |
|
|
};
|
| 1820 |
749 |
hucheng |
#endif
|
| 1821 |
179 |
syang |
|
| 1822 |
|
|
OPTION_GROUP Cg_Option_Groups[] = {
|
| 1823 |
3577 |
leihuang |
{ "CG", ':', '=', Options_CG },
|
| 1824 |
|
|
#if !defined(TARG_NVISA)
|
| 1825 |
179 |
syang |
{ "SWP", ':', '=', Options_CG_SWP },
|
| 1826 |
|
|
{ "GRA", ':', '=', Options_GRA },
|
| 1827 |
3577 |
leihuang |
#endif
|
| 1828 |
749 |
hucheng |
#ifdef TARG_IA64
|
| 1829 |
179 |
syang |
{ "IPFEC", ':', '=', Options_IPFEC },
|
| 1830 |
|
|
{ "CYCLE", ':', '=', Options_CYCLE },
|
| 1831 |
|
|
{ "VT", ':', '=', Options_VT },
|
| 1832 |
|
|
{ "SKIP", ':', '=', Options_SKIP },
|
| 1833 |
749 |
hucheng |
#endif
|
| 1834 |
3577 |
leihuang |
#ifdef TARG_LOONGSON
|
| 1835 |
|
|
{ "IPFEC", ':', '=', Options_IPFEC },
|
| 1836 |
|
|
#endif
|
| 1837 |
179 |
syang |
{ NULL } /* List terminator -- must be last */
|
| 1838 |
|
|
};
|
| 1839 |
|
|
|
| 1840 |
|
|
|
| 1841 |
|
|
extern INT prefetch_ahead;
|
| 1842 |
|
|
INT _prefetch_ahead = 2;
|
| 1843 |
3577 |
leihuang |
#if defined(BUILD_OS_DARWIN) || !defined(SHARED_BUILD)
|
| 1844 |
|
|
/* Apparently not referenced elsewhere; Mach-O can't do aliases */
|
| 1845 |
|
|
#define prefetch_ahead (_prefetch_ahead)
|
| 1846 |
|
|
#else /* defined(BUILD_OS_DARWIN) */
|
| 1847 |
179 |
syang |
#pragma weak prefetch_ahead = _prefetch_ahead
|
| 1848 |
3577 |
leihuang |
#endif /* defined(BUILD_OS_DARWIN) */
|
| 1849 |
179 |
syang |
|
| 1850 |
|
|
/* =======================================================================
|
| 1851 |
|
|
*
|
| 1852 |
|
|
* Configure_Prefetch
|
| 1853 |
|
|
*
|
| 1854 |
|
|
* Configure the prefetch flags controlled by prefetch_ahead exported
|
| 1855 |
|
|
* from LNO. It MUST be called after lno.so has been loaded.
|
| 1856 |
|
|
*
|
| 1857 |
|
|
* =======================================================================
|
| 1858 |
|
|
*/
|
| 1859 |
|
|
static void
|
| 1860 |
|
|
Configure_prefetch_ahead(void)
|
| 1861 |
|
|
{
|
| 1862 |
|
|
static INT32 save_L1_pf_latency = -1;
|
| 1863 |
|
|
static INT32 save_L2_pf_latency = -1;
|
| 1864 |
|
|
if ( save_L1_pf_latency < 0 ) {
|
| 1865 |
|
|
save_L1_pf_latency = CG_L1_pf_latency;
|
| 1866 |
|
|
save_L2_pf_latency = CG_L2_pf_latency;
|
| 1867 |
|
|
}
|
| 1868 |
|
|
if (Enable_Prefetch_Ahead_For_Target()) {
|
| 1869 |
|
|
if ( ! CG_L2_pf_latency_overridden )
|
| 1870 |
|
|
if ( prefetch_ahead )
|
| 1871 |
|
|
CG_L2_pf_latency = 0;
|
| 1872 |
|
|
else
|
| 1873 |
|
|
CG_L2_pf_latency = save_L2_pf_latency;
|
| 1874 |
|
|
if ( ! CG_L1_pf_latency_overridden )
|
| 1875 |
|
|
if (prefetch_ahead)
|
| 1876 |
|
|
CG_L1_pf_latency = 0;
|
| 1877 |
|
|
else
|
| 1878 |
|
|
CG_L1_pf_latency = save_L1_pf_latency;
|
| 1879 |
|
|
}
|
| 1880 |
|
|
}
|
| 1881 |
|
|
|
| 1882 |
|
|
|
| 1883 |
|
|
/* =======================================================================
|
| 1884 |
|
|
*
|
| 1885 |
|
|
* Configure_Prefetch
|
| 1886 |
|
|
*
|
| 1887 |
|
|
* Configure the prefetch flags.
|
| 1888 |
|
|
*
|
| 1889 |
|
|
* =======================================================================
|
| 1890 |
|
|
*/
|
| 1891 |
|
|
static void
|
| 1892 |
|
|
Configure_Prefetch(void)
|
| 1893 |
|
|
{
|
| 1894 |
|
|
if ( ! OPT_shared_memory) {
|
| 1895 |
|
|
CG_exclusive_prefetch = TRUE;
|
| 1896 |
|
|
}
|
| 1897 |
|
|
/* Detect any of the various cases that cause us to disable
|
| 1898 |
|
|
* prefetching entirely:
|
| 1899 |
|
|
* isa < mips4
|
| 1900 |
|
|
* -CG:prefetch=off
|
| 1901 |
|
|
* -CG:z_conf_prefetch=off:nz_conf_prefetch=off
|
| 1902 |
|
|
*/
|
| 1903 |
|
|
if ( ! Target_Has_Prefetch()
|
| 1904 |
|
|
|| (CG_enable_prefetch_overridden && ! CG_enable_prefetch)
|
| 1905 |
|
|
|| ( CG_enable_z_conf_prefetch_overridden
|
| 1906 |
|
|
&& ! CG_enable_z_conf_prefetch
|
| 1907 |
|
|
&& CG_enable_nz_conf_prefetch_overridden
|
| 1908 |
|
|
&& ! CG_enable_nz_conf_prefetch)
|
| 1909 |
|
|
) {
|
| 1910 |
|
|
disable_prefetch:
|
| 1911 |
|
|
CG_enable_prefetch = FALSE;
|
| 1912 |
|
|
CG_enable_z_conf_prefetch = FALSE;
|
| 1913 |
|
|
CG_enable_nz_conf_prefetch = FALSE;
|
| 1914 |
|
|
CG_enable_pf_L1_ld = FALSE;
|
| 1915 |
|
|
CG_enable_pf_L1_st = FALSE;
|
| 1916 |
|
|
CG_enable_pf_L2_ld = FALSE;
|
| 1917 |
|
|
CG_enable_pf_L2_st = FALSE;
|
| 1918 |
|
|
return;
|
| 1919 |
|
|
}
|
| 1920 |
|
|
|
| 1921 |
|
|
/* At this point, -CG:prefetch was explicitly set to true, or
|
| 1922 |
|
|
* unspecified.
|
| 1923 |
|
|
*/
|
| 1924 |
|
|
if ( ! CG_enable_prefetch_overridden ) {
|
| 1925 |
|
|
CG_enable_prefetch = FALSE;
|
| 1926 |
|
|
|
| 1927 |
|
|
/* -CG:z_conf_prefetch or -CG:nz_conf_prefetch implicitly
|
| 1928 |
|
|
* set to TRUE, implies we should enable prefetching.
|
| 1929 |
|
|
*/
|
| 1930 |
|
|
if ( ( CG_enable_z_conf_prefetch_overridden
|
| 1931 |
|
|
&& CG_enable_z_conf_prefetch)
|
| 1932 |
|
|
|| ( CG_enable_nz_conf_prefetch_overridden
|
| 1933 |
|
|
&& CG_enable_nz_conf_prefetch)
|
| 1934 |
|
|
) {
|
| 1935 |
|
|
CG_enable_prefetch = TRUE;
|
| 1936 |
|
|
}
|
| 1937 |
|
|
|
| 1938 |
|
|
/* Some targets implicitly enable prefetching.
|
| 1939 |
|
|
*/
|
| 1940 |
|
|
else if (Enable_Prefetch_For_Target()) {
|
| 1941 |
|
|
CG_enable_prefetch = TRUE;
|
| 1942 |
|
|
}
|
| 1943 |
|
|
|
| 1944 |
|
|
/* No implicit enable of prefetching this time...
|
| 1945 |
|
|
*/
|
| 1946 |
|
|
else goto disable_prefetch;
|
| 1947 |
|
|
}
|
| 1948 |
|
|
|
| 1949 |
|
|
/* Prefetching is enabled, implicitly or explicitly. Handle any
|
| 1950 |
|
|
* defaults, both target independent and target specific.
|
| 1951 |
|
|
*/
|
| 1952 |
|
|
if ( ! CG_enable_z_conf_prefetch_overridden )
|
| 1953 |
|
|
CG_enable_z_conf_prefetch = FALSE;
|
| 1954 |
|
|
if ( ! CG_enable_nz_conf_prefetch_overridden )
|
| 1955 |
|
|
CG_enable_nz_conf_prefetch = TRUE;
|
| 1956 |
|
|
|
| 1957 |
|
|
if (Enable_Prefetch_For_Target()) {
|
| 1958 |
749 |
hucheng |
if ( ! CG_L1_ld_latency_overridden ) CG_L1_ld_latency = 8;
|
| 1959 |
898 |
fengzhou |
#ifndef TARG_IA64
|
| 1960 |
749 |
hucheng |
if ( ! CG_enable_pf_L1_ld_overridden ) CG_enable_pf_L1_ld = TRUE;
|
| 1961 |
|
|
if ( ! CG_enable_pf_L1_st_overridden ) CG_enable_pf_L1_st = TRUE;
|
| 1962 |
|
|
#else
|
| 1963 |
179 |
syang |
if ( ! CG_enable_pf_L1_ld_overridden ) CG_enable_pf_L1_ld = FALSE;
|
| 1964 |
|
|
if ( ! CG_enable_pf_L1_st_overridden ) CG_enable_pf_L1_st = FALSE;
|
| 1965 |
749 |
hucheng |
#endif
|
| 1966 |
179 |
syang |
if ( ! CG_enable_pf_L2_ld_overridden ) CG_enable_pf_L2_ld = TRUE;
|
| 1967 |
|
|
if ( ! CG_enable_pf_L2_st_overridden ) CG_enable_pf_L2_st = TRUE;
|
| 1968 |
|
|
} else {
|
| 1969 |
|
|
if ( ! CG_enable_pf_L1_ld_overridden ) CG_enable_pf_L1_ld = TRUE;
|
| 1970 |
|
|
if ( ! CG_enable_pf_L1_st_overridden ) CG_enable_pf_L1_st = TRUE;
|
| 1971 |
|
|
if ( ! CG_enable_pf_L2_ld_overridden ) CG_enable_pf_L2_ld = TRUE;
|
| 1972 |
|
|
if ( ! CG_enable_pf_L2_st_overridden ) CG_enable_pf_L2_st = TRUE;
|
| 1973 |
|
|
}
|
| 1974 |
|
|
|
| 1975 |
|
|
/* Finally, check to see if we actually will do any prefetching, and
|
| 1976 |
|
|
* if not, disable prefetching all together.
|
| 1977 |
|
|
*/
|
| 1978 |
|
|
if ( ! CG_enable_pf_L1_ld
|
| 1979 |
|
|
&& ! CG_enable_pf_L1_st
|
| 1980 |
|
|
&& ! CG_enable_pf_L2_ld
|
| 1981 |
|
|
&& ! CG_enable_pf_L2_st ) goto disable_prefetch;
|
| 1982 |
|
|
}
|
| 1983 |
|
|
|
| 1984 |
|
|
|
| 1985 |
|
|
/* =======================================================================
|
| 1986 |
|
|
*
|
| 1987 |
|
|
* Configure_CG_Options
|
| 1988 |
|
|
*
|
| 1989 |
|
|
* After the comand line has been processed and CG_opt_level set, configure
|
| 1990 |
|
|
* the various CG flags that depend on these two things.
|
| 1991 |
|
|
* This is also called per PU if the PU opt level changes.
|
| 1992 |
|
|
*
|
| 1993 |
|
|
* =======================================================================
|
| 1994 |
|
|
*/
|
| 1995 |
|
|
static void
|
| 1996 |
|
|
Configure_CG_Options(void)
|
| 1997 |
|
|
{
|
| 1998 |
|
|
/* Set code generation options -- see cg.h: */
|
| 1999 |
|
|
|
| 2000 |
|
|
if ( ! CG_localize_tns_Set)
|
| 2001 |
|
|
CG_localize_tns = (CG_opt_level <= 1);
|
| 2002 |
|
|
|
| 2003 |
|
|
if ( ! Enable_SWP_overridden )
|
| 2004 |
|
|
{
|
| 2005 |
|
|
// Enable_SWP = (CG_opt_level > 2) && ! OPT_Space;
|
| 2006 |
|
|
#ifdef TARG_IA64
|
| 2007 |
|
|
Enable_SWP = CG_opt_level >= 2;
|
| 2008 |
|
|
#else
|
| 2009 |
|
|
Enable_SWP = FALSE;
|
| 2010 |
|
|
#endif
|
| 2011 |
|
|
}
|
| 2012 |
|
|
|
| 2013 |
|
|
if (CG_opt_level > 2 && !OPT_unroll_size_overridden )
|
| 2014 |
3577 |
leihuang |
#if defined(KEY) && defined(TARG_X8664) //adjust unroll_size default for em64t and core
|
| 2015 |
|
|
if (Is_Target_EM64T() || Is_Target_Core())
|
| 2016 |
|
|
OPT_unroll_size = 256;
|
| 2017 |
|
|
else
|
| 2018 |
|
|
OPT_unroll_size = 128;
|
| 2019 |
|
|
#elif !defined(TARG_NVISA)
|
| 2020 |
|
|
OPT_unroll_size = 128;
|
| 2021 |
|
|
#endif
|
| 2022 |
179 |
syang |
|
| 2023 |
3675 |
dreachem |
#ifdef TARG_X8664
|
| 2024 |
|
|
if (Is_Target_Orochi() || Is_Target_Barcelona()) {
|
| 2025 |
|
|
// check if default to determine if we use best fit unrolling or not
|
| 2026 |
|
|
if ((OPT_unroll_size == 128) &&
|
| 2027 |
|
|
(OPT_unroll_times == 4) &&
|
| 2028 |
|
|
(WOPT_Enable_WN_Unroll == 1)) {
|
| 2029 |
|
|
if (CG_LOOP_nounroll_best_fit_set == false)
|
| 2030 |
|
|
CG_LOOP_unroll_best_fit = TRUE;
|
| 2031 |
|
|
}
|
| 2032 |
|
|
}
|
| 2033 |
|
|
#endif
|
| 2034 |
|
|
|
| 2035 |
179 |
syang |
if ( OPT_Unroll_Analysis_Set )
|
| 2036 |
|
|
{
|
| 2037 |
|
|
CG_LOOP_unroll_analysis = OPT_Unroll_Analysis;
|
| 2038 |
|
|
}
|
| 2039 |
|
|
CG_LOOP_unroll_times_max = OPT_unroll_times;
|
| 2040 |
|
|
CG_LOOP_unrolled_size_max = OPT_unroll_size;
|
| 2041 |
3577 |
leihuang |
CG_LOOP_unroll_level = OPT_unroll_level;
|
| 2042 |
179 |
syang |
|
| 2043 |
3578 |
dreachem |
#if defined(TARG_X8664)
|
| 2044 |
|
|
// set reg pressure hueristic flags for prescheduling
|
| 2045 |
|
|
switch (LOCS_PRE_Enable_Minreg_Level) {
|
| 2046 |
|
|
case 1: LOCS_PRE_Enable_General_RegPressure_Sched = TRUE; break;
|
| 2047 |
|
|
case 2: LOCS_PRE_Enable_Unroll_RegPressure_Sched = TRUE; break;
|
| 2048 |
|
|
default:
|
| 2049 |
|
|
break;
|
| 2050 |
|
|
}
|
| 2051 |
|
|
#endif
|
| 2052 |
|
|
|
| 2053 |
179 |
syang |
CG_LOOP_ooo_unroll_heuristics = PROC_is_out_of_order();
|
| 2054 |
|
|
|
| 2055 |
|
|
if (OPT_Space)
|
| 2056 |
|
|
{
|
| 2057 |
|
|
CGEXP_expandconstant = 2;
|
| 2058 |
|
|
}
|
| 2059 |
|
|
|
| 2060 |
749 |
hucheng |
if (!Integer_Divide_By_Constant_overridden
|
| 2061 |
3577 |
leihuang |
#ifdef KEY
|
| 2062 |
749 |
hucheng |
&& CGEXP_cvrt_int_div_to_mult
|
| 2063 |
|
|
#endif
|
| 2064 |
|
|
) {
|
| 2065 |
179 |
syang |
CGEXP_cvrt_int_div_to_mult = (!OPT_Space) && (CG_opt_level > 0);
|
| 2066 |
|
|
}
|
| 2067 |
|
|
|
| 2068 |
749 |
hucheng |
if (!Integer_Divide_Use_Float_overridden
|
| 2069 |
3577 |
leihuang |
#ifdef KEY
|
| 2070 |
749 |
hucheng |
&& CGEXP_cvrt_int_div_to_fdiv
|
| 2071 |
|
|
#endif
|
| 2072 |
|
|
) {
|
| 2073 |
179 |
syang |
CGEXP_cvrt_int_div_to_fdiv = !Kernel_Code
|
| 2074 |
|
|
&& Enable_Idiv_In_FPU_For_Target()
|
| 2075 |
|
|
&& !OPT_Space
|
| 2076 |
|
|
&& CG_opt_level > 0;
|
| 2077 |
|
|
}
|
| 2078 |
|
|
|
| 2079 |
3577 |
leihuang |
#ifdef KEY
|
| 2080 |
|
|
if (!Integer_Multiply_By_Constant_overridden &&
|
| 2081 |
|
|
CGEXP_cvrt_int_mult_to_add_shift) {
|
| 2082 |
|
|
CGEXP_cvrt_int_mult_to_add_shift = (!OPT_Space) && (CG_opt_level > 0);
|
| 2083 |
|
|
}
|
| 2084 |
|
|
#endif
|
| 2085 |
|
|
|
| 2086 |
179 |
syang |
if (Kernel_Code && !CG_tail_call_overridden) CG_tail_call = FALSE;
|
| 2087 |
|
|
|
| 2088 |
|
|
if (Kernel_Code && !GCM_Speculative_Ptr_Deref_Set)
|
| 2089 |
|
|
GCM_Eager_Ptr_Deref = FALSE;
|
| 2090 |
|
|
|
| 2091 |
|
|
if (!CGTARG_Branch_Taken_Prob_overridden)
|
| 2092 |
|
|
CGTARG_Branch_Taken_Prob = "0.95";
|
| 2093 |
|
|
CGTARG_Branch_Taken_Probability = atof(CGTARG_Branch_Taken_Prob);
|
| 2094 |
|
|
|
| 2095 |
|
|
if ( !CG_enable_spec_idiv_overridden && Enable_Spec_Idiv_For_Target() )
|
| 2096 |
|
|
CG_enable_spec_idiv = FALSE;
|
| 2097 |
|
|
|
| 2098 |
3577 |
leihuang |
if ( ! CG_LOOP_fix_recurrences_specified
|
| 2099 |
179 |
syang |
&& ( CG_LOOP_back_substitution
|
| 2100 |
|
|
&& CG_LOOP_back_substitution_specified
|
| 2101 |
|
|
|| CG_LOOP_interleave_reductions
|
| 2102 |
|
|
&& CG_LOOP_interleave_reductions_specified
|
| 2103 |
|
|
|| CG_LOOP_interleave_posti
|
| 2104 |
|
|
&& CG_LOOP_interleave_posti_specified
|
| 2105 |
|
|
|| CG_LOOP_reassociate
|
| 2106 |
|
|
&& CG_LOOP_reassociate_specified)) {
|
| 2107 |
|
|
CG_LOOP_fix_recurrences = TRUE;
|
| 2108 |
|
|
}
|
| 2109 |
|
|
|
| 2110 |
|
|
if ( Enable_SWP && ! Enable_LOH_overridden )
|
| 2111 |
|
|
Enable_LOH = Enable_LOH_For_Target();
|
| 2112 |
|
|
|
| 2113 |
|
|
if (!EBO_Opt_Level_overridden) {
|
| 2114 |
|
|
EBO_Opt_Level = (CG_opt_level > 0) ? EBO_Opt_Level_Default : 0;
|
| 2115 |
|
|
}
|
| 2116 |
|
|
Enable_CG_Peephole = (CG_opt_level > 0) ? TRUE : FALSE;
|
| 2117 |
749 |
hucheng |
#ifdef TARG_IA64
|
| 2118 |
179 |
syang |
|
| 2119 |
|
|
if ( IPFEC_Profitability ) {
|
| 2120 |
|
|
// region formation
|
| 2121 |
|
|
IPFEC_Enable_Region_Formation = FALSE;
|
| 2122 |
|
|
|
| 2123 |
|
|
// if-conversion
|
| 2124 |
|
|
IPFEC_Enable_If_Conversion = TRUE;
|
| 2125 |
|
|
IPFEC_Force_If_Conv = FALSE;
|
| 2126 |
|
|
IPFEC_Force_Para_Comp_Gen = FALSE;
|
| 2127 |
|
|
IPFEC_Para_Comp_Gen = TRUE;
|
| 2128 |
|
|
IPFEC_Disable_Merge_BB = FALSE;
|
| 2129 |
|
|
|
| 2130 |
|
|
// predicate analysis
|
| 2131 |
|
|
IPFEC_Enable_PRDB= TRUE;
|
| 2132 |
|
|
|
| 2133 |
|
|
//opt after schedule
|
| 2134 |
|
|
IPFEC_Enable_Opt_after_schedule=TRUE;
|
| 2135 |
|
|
|
| 2136 |
|
|
// scheduling
|
| 2137 |
|
|
IPFEC_Enable_Prepass_GLOS = TRUE;
|
| 2138 |
|
|
IPFEC_Enable_Postpass_LOCS = TRUE;
|
| 2139 |
|
|
|
| 2140 |
|
|
// specultion
|
| 2141 |
|
|
IPFEC_Enable_Data_Speculation = TRUE;
|
| 2142 |
|
|
IPFEC_Force_CHK_Fail = FALSE;
|
| 2143 |
|
|
IPFEC_Enable_Cascade = TRUE;
|
| 2144 |
|
|
IPFEC_Hold_Uses = FALSE;
|
| 2145 |
|
|
IPFEC_Chk_Compact = TRUE;
|
| 2146 |
|
|
IPFEC_Enable_Safety_Load = TRUE;
|
| 2147 |
|
|
|
| 2148 |
|
|
// micro-scheduling
|
| 2149 |
|
|
IPFEC_Enable_Compressed_Template = TRUE;
|
| 2150 |
|
|
IPFEC_Enable_Pre_Bundling = TRUE;
|
| 2151 |
|
|
}
|
| 2152 |
749 |
hucheng |
#endif
|
| 2153 |
179 |
syang |
|
| 2154 |
|
|
/* Enable_Fill_Delay_Slots controls the filling of delay slots in locs
|
| 2155 |
|
|
and gcm */
|
| 2156 |
|
|
if (!Enable_Fill_Delay_Slots_For_Target() || !Enable_Fill_Delay_Slots)
|
| 2157 |
|
|
GCM_Enable_Fill_Delay_Slots = FALSE;
|
| 2158 |
|
|
|
| 2159 |
|
|
/* Clamp body_ins_count_max to max BB length
|
| 2160 |
|
|
*/
|
| 2161 |
|
|
if (CG_maxinss_overridden) {
|
| 2162 |
|
|
if (CG_maxinss > Split_BB_Length) {
|
| 2163 |
|
|
Split_BB_Length = CG_maxinss;
|
| 2164 |
|
|
}
|
| 2165 |
|
|
} else {
|
| 2166 |
|
|
CG_maxinss = CG_maxinss_default * CG_opt_level;
|
| 2167 |
|
|
if (CG_maxinss == 0 || CG_maxinss > Split_BB_Length) {
|
| 2168 |
|
|
CG_maxinss = Split_BB_Length;
|
| 2169 |
|
|
}
|
| 2170 |
|
|
}
|
| 2171 |
|
|
|
| 2172 |
|
|
|
| 2173 |
|
|
/* Set BB clone limits
|
| 2174 |
|
|
*/
|
| 2175 |
|
|
if ( Kernel_Code && ! CFLOW_Enable_Clone_overridden ) {
|
| 2176 |
|
|
// if kernel code then want really minimal space,
|
| 2177 |
|
|
// so turn off cloning altogether
|
| 2178 |
|
|
CFLOW_Enable_Clone = FALSE;
|
| 2179 |
|
|
} else if (OPT_Space) {
|
| 2180 |
|
|
if (!clone_incr_overridden) CFLOW_clone_incr = 1;
|
| 2181 |
|
|
if (!clone_min_incr_overridden) CFLOW_clone_min_incr = 1;
|
| 2182 |
|
|
if (!clone_max_incr_overridden) CFLOW_clone_max_incr = 3;
|
| 2183 |
|
|
}
|
| 2184 |
|
|
|
| 2185 |
3577 |
leihuang |
#ifdef TARG_NVISA
|
| 2186 |
|
|
CG_localize_tns = TRUE;
|
| 2187 |
|
|
Enable_SWP = FALSE;
|
| 2188 |
|
|
#ifdef FUTURE_SUPPORT
|
| 2189 |
|
|
if (!CG_use_16bit_ops_overridden)
|
| 2190 |
|
|
CG_use_16bit_ops = (Target_ISA < TARGET_ISA_compute_20);
|
| 2191 |
|
|
if (!CG_rematerialize_grf_overridden)
|
| 2192 |
|
|
CG_rematerialize_grf = (Target_ISA < TARGET_ISA_compute_20);
|
| 2193 |
|
|
#endif
|
| 2194 |
|
|
#endif
|
| 2195 |
|
|
|
| 2196 |
179 |
syang |
Configure_Prefetch();
|
| 2197 |
749 |
hucheng |
#ifdef TARG_X8664
|
| 2198 |
|
|
if ((Target == TARGET_em64t ||
|
| 2199 |
3577 |
leihuang |
Target == TARGET_core ||
|
| 2200 |
|
|
Target == TARGET_wolfdale) &&
|
| 2201 |
749 |
hucheng |
! CG_use_xortozero_Set) {
|
| 2202 |
|
|
CG_use_xortozero = TRUE;
|
| 2203 |
|
|
}
|
| 2204 |
|
|
|
| 2205 |
|
|
if (OPT_Space && !CG_use_xortozero_Set) // Bug 9717
|
| 2206 |
|
|
CG_use_xortozero = TRUE;
|
| 2207 |
3577 |
leihuang |
|
| 2208 |
3578 |
dreachem |
if ((Target == TARGET_barcelona) &&
|
| 2209 |
3577 |
leihuang |
!CG_push_pop_int_saved_regs_Set)
|
| 2210 |
|
|
CG_push_pop_int_saved_regs = TRUE;
|
| 2211 |
749 |
hucheng |
#endif
|
| 2212 |
179 |
syang |
}
|
| 2213 |
|
|
|
| 2214 |
|
|
/* =======================================================================
|
| 2215 |
|
|
*
|
| 2216 |
|
|
* CG_Configure_Opt_Level
|
| 2217 |
|
|
*
|
| 2218 |
|
|
* See interface description.
|
| 2219 |
|
|
*
|
| 2220 |
|
|
* =======================================================================
|
| 2221 |
|
|
*/
|
| 2222 |
|
|
void
|
| 2223 |
|
|
CG_Configure_Opt_Level( INT opt_level )
|
| 2224 |
|
|
{
|
| 2225 |
|
|
static BOOL opt_level_configured = FALSE;
|
| 2226 |
|
|
|
| 2227 |
|
|
if ( opt_level_configured && opt_level == CG_opt_level )
|
| 2228 |
|
|
return;
|
| 2229 |
|
|
|
| 2230 |
|
|
if ( opt_level_configured && cg_opt_level_overridden ) {
|
| 2231 |
|
|
/* forget it */
|
| 2232 |
|
|
DevWarn("Attempt to override CG:opt_level=%d flag. Ignored.",CG_opt_level);
|
| 2233 |
|
|
return;
|
| 2234 |
|
|
}
|
| 2235 |
|
|
|
| 2236 |
|
|
opt_level_configured = TRUE;
|
| 2237 |
|
|
|
| 2238 |
|
|
if ( ! cg_opt_level_overridden )
|
| 2239 |
|
|
CG_opt_level = opt_level;
|
| 2240 |
|
|
|
| 2241 |
|
|
Configure_CG_Options();
|
| 2242 |
|
|
}
|
| 2243 |
|
|
|
| 2244 |
|
|
|
| 2245 |
|
|
/* ====================================================================
|
| 2246 |
|
|
*
|
| 2247 |
|
|
* Build_Option_String
|
| 2248 |
|
|
*
|
| 2249 |
|
|
* Just build a string of all the options passed to the Common Core
|
| 2250 |
|
|
* process, so the options can be printed at the beginning of the "*.s"
|
| 2251 |
|
|
* file(s).
|
| 2252 |
|
|
*
|
| 2253 |
|
|
* ====================================================================
|
| 2254 |
|
|
*/
|
| 2255 |
|
|
|
| 2256 |
|
|
static void
|
| 2257 |
|
|
Build_Option_String (INT argc, char **argv)
|
| 2258 |
|
|
{
|
| 2259 |
|
|
INT16 i;
|
| 2260 |
|
|
INT16 arg_size = 0;
|
| 2261 |
|
|
|
| 2262 |
|
|
Argv0 = argv[0]; /* save argv[0] for R_Assemble_File() */
|
| 2263 |
|
|
|
| 2264 |
|
|
for (i=1; i<argc; ++i) /* skip arg 0 (the program name) */
|
| 2265 |
|
|
if ( argv[i][0] == '-' && argv[i][1] != 'f')
|
| 2266 |
|
|
arg_size += ( strlen(argv[i]) + 1 );
|
| 2267 |
|
|
|
| 2268 |
|
|
if ( arg_size > 0 ) {
|
| 2269 |
|
|
register char *p;
|
| 2270 |
|
|
|
| 2271 |
|
|
p = option_string = (char *) malloc(arg_size+1);
|
| 2272 |
|
|
|
| 2273 |
|
|
if ( option_string == NULL ) {
|
| 2274 |
|
|
ErrMsg ( EC_No_Mem, "Build_Option_String" );
|
| 2275 |
|
|
exit ( 1 );
|
| 2276 |
|
|
}
|
| 2277 |
|
|
|
| 2278 |
|
|
p[0] = '\0';
|
| 2279 |
|
|
for (i=1; i<argc; ++i)
|
| 2280 |
|
|
if ( argv[i][0] == '-' && argv[i][1] != 'f') {
|
| 2281 |
|
|
register INT len = strlen (argv[i]) + 1;
|
| 2282 |
|
|
if (p != option_string)
|
| 2283 |
|
|
*p++ = ' ';
|
| 2284 |
|
|
bcopy (argv[i], p, len);
|
| 2285 |
|
|
p += len - 1;
|
| 2286 |
|
|
}
|
| 2287 |
|
|
|
| 2288 |
|
|
} else { /* no options specified */
|
| 2289 |
3577 |
leihuang |
option_string = const_cast<char*>("none");
|
| 2290 |
179 |
syang |
}
|
| 2291 |
|
|
} /* end: Build_Option_String */
|
| 2292 |
|
|
|
| 2293 |
|
|
/* ====================================================================
|
| 2294 |
|
|
*
|
| 2295 |
|
|
* Process_Command_Line
|
| 2296 |
|
|
*
|
| 2297 |
|
|
* Process the command line arguments specific to CG.
|
| 2298 |
|
|
*
|
| 2299 |
|
|
* ====================================================================
|
| 2300 |
|
|
*/
|
| 2301 |
|
|
|
| 2302 |
|
|
static void
|
| 2303 |
|
|
Process_Command_Line (INT argc, char **argv)
|
| 2304 |
|
|
{
|
| 2305 |
|
|
INT16 i;
|
| 2306 |
|
|
char *cp;
|
| 2307 |
|
|
|
| 2308 |
|
|
/* Check the command line flags: */
|
| 2309 |
|
|
for ( i=0; i<argc; i++ ) {
|
| 2310 |
|
|
if ( argv[i] != NULL && *(argv[i]) == '-' ) {
|
| 2311 |
|
|
cp = argv[i]+1; /* Pointer to next flag character */
|
| 2312 |
|
|
|
| 2313 |
|
|
/* First try to process as command-line option group */
|
| 2314 |
|
|
if (Process_Command_Line_Group(cp, Cg_Option_Groups))
|
| 2315 |
|
|
continue;
|
| 2316 |
|
|
|
| 2317 |
|
|
switch ( *cp++ ) {
|
| 2318 |
|
|
|
| 2319 |
|
|
case 'f': /* file options */
|
| 2320 |
|
|
/* error case already handled by main driver */
|
| 2321 |
|
|
switch (*cp) {
|
| 2322 |
|
|
case 'a': /* Assembly file */
|
| 2323 |
|
|
case 's':
|
| 2324 |
|
|
Assembly = TRUE;
|
| 2325 |
|
|
Asm_File_Name = cp + 2;
|
| 2326 |
|
|
break;
|
| 2327 |
|
|
|
| 2328 |
|
|
case 'o': /* object file */
|
| 2329 |
|
|
Object_Code = TRUE;
|
| 2330 |
|
|
Obj_File_Name = cp + 2;
|
| 2331 |
|
|
break;
|
| 2332 |
|
|
|
| 2333 |
|
|
}
|
| 2334 |
|
|
break;
|
| 2335 |
|
|
|
| 2336 |
|
|
case 's': /* -s: Produce assembly file: */
|
| 2337 |
|
|
case 'S': /* -S: Produce assembly file: */
|
| 2338 |
|
|
Assembly = TRUE;
|
| 2339 |
|
|
break;
|
| 2340 |
|
|
|
| 2341 |
|
|
case 't':
|
| 2342 |
|
|
/* handle the -tfprev10 option to fix tfp hardware bugs. */
|
| 2343 |
|
|
if ( strncmp ( cp-1, "tfprev10", 8 ) == 0 ) {
|
| 2344 |
|
|
No_Quad_Aligned_Branch = TRUE;
|
| 2345 |
|
|
}
|
| 2346 |
|
|
|
| 2347 |
|
|
break;
|
| 2348 |
749 |
hucheng |
#ifdef TARG_IA64
|
| 2349 |
179 |
syang |
case 'O':
|
| 2350 |
|
|
if (!strncasecmp (cp-1, "orc:=",5)) {
|
| 2351 |
|
|
cp += 4 ;
|
| 2352 |
|
|
if (!strcasecmp (cp, "on") || !strcasecmp(cp, "true")) {
|
| 2353 |
|
|
CG_Enable_Ipfec_Phases = TRUE;
|
| 2354 |
|
|
} else if (!strcasecmp (cp, "off") || !strcasecmp(cp, "false")) {
|
| 2355 |
|
|
CG_Enable_Ipfec_Phases = FALSE;
|
| 2356 |
|
|
}
|
| 2357 |
|
|
}
|
| 2358 |
|
|
break;
|
| 2359 |
749 |
hucheng |
#endif
|
| 2360 |
758 |
laijx |
}
|
| 2361 |
179 |
syang |
}
|
| 2362 |
|
|
}
|
| 2363 |
|
|
}
|
| 2364 |
|
|
|
| 2365 |
|
|
/* ====================================================================
|
| 2366 |
|
|
*
|
| 2367 |
|
|
* Prepare_Source
|
| 2368 |
|
|
*
|
| 2369 |
|
|
* Process the source argument and associated files.
|
| 2370 |
|
|
*
|
| 2371 |
|
|
* ====================================================================
|
| 2372 |
|
|
*/
|
| 2373 |
|
|
|
| 2374 |
|
|
static void
|
| 2375 |
|
|
Prepare_Source (void)
|
| 2376 |
|
|
{
|
| 2377 |
|
|
char *fname;
|
| 2378 |
|
|
|
| 2379 |
|
|
/* We've got a source file name -- open other files.
|
| 2380 |
|
|
* We want them to be created in the current directory, so we
|
| 2381 |
|
|
* strip off the filename only from Src_File_Name for use:
|
| 2382 |
|
|
*/
|
| 2383 |
3577 |
leihuang |
#if defined(TARG_SL)
|
| 2384 |
|
|
/* In kernel building, we may generate several object files from
|
| 2385 |
|
|
* single .c file, the good way to name the related files should be
|
| 2386 |
|
|
* according to the object file in the original user command. But the
|
| 2387 |
|
|
* original object file is not transferred to the 'be', so I can use
|
| 2388 |
|
|
* Irb_File_Name instead, which comes from the original object file
|
| 2389 |
|
|
*/
|
| 2390 |
|
|
if( Irb_File_Name )
|
| 2391 |
|
|
fname = Last_Pathname_Component ( Irb_File_Name );
|
| 2392 |
|
|
else
|
| 2393 |
|
|
#endif
|
| 2394 |
179 |
syang |
fname = Last_Pathname_Component ( Src_File_Name );
|
| 2395 |
|
|
|
| 2396 |
|
|
/* If we're producing information for CITE, we need an assembly
|
| 2397 |
|
|
* file even if it wasn't explicitly requested:
|
| 2398 |
|
|
*/
|
| 2399 |
|
|
if ( List_Cite ) {
|
| 2400 |
|
|
Assembly = TRUE;
|
| 2401 |
|
|
}
|
| 2402 |
|
|
|
| 2403 |
|
|
if ( Assembly ) {
|
| 2404 |
|
|
if ( Asm_File_Name == NULL ) {
|
| 2405 |
|
|
/* Replace source file extension to get assembly file name: */
|
| 2406 |
|
|
Asm_File_Name = New_Extension (fname, ASM_FILE_EXTENSION );
|
| 2407 |
|
|
}
|
| 2408 |
|
|
|
| 2409 |
|
|
/* Open the ASM file for compilation: */
|
| 2410 |
|
|
if ( ( Asm_File = fopen ( Asm_File_Name, "w" ) ) == NULL ) {
|
| 2411 |
|
|
ErrMsg ( EC_Asm_Open, Asm_File_Name, errno );
|
| 2412 |
|
|
Terminate (1);
|
| 2413 |
|
|
}
|
| 2414 |
749 |
hucheng |
#ifdef TARG_IA64
|
| 2415 |
179 |
syang |
if (Create_Cycle_Output) {
|
| 2416 |
|
|
if ( ( Output_h_File = fopen( Output_h_File_Name, "w" ) ) == NULL ) { ErrMsg ( EC_Asm_Open, Output_h_File_Name, errno );
|
| 2417 |
|
|
Terminate (1);
|
| 2418 |
|
|
}
|
| 2419 |
|
|
}
|
| 2420 |
749 |
hucheng |
#endif
|
| 2421 |
179 |
syang |
}
|
| 2422 |
|
|
|
| 2423 |
|
|
/* Prepare relocatable object file name: */
|
| 2424 |
|
|
if ( Obj_File_Name == NULL ) {
|
| 2425 |
3577 |
leihuang |
#if defined(KEY) && !defined(TARG_NVISA)
|
| 2426 |
|
|
// nvisa doesn't need tempnam, which will cause gcc complaint
|
| 2427 |
749 |
hucheng |
/* bug 2025
|
| 2428 |
|
|
Always create the object file in /tmp, since the current dir might
|
| 2429 |
|
|
not be writable.
|
| 2430 |
|
|
*/
|
| 2431 |
|
|
char* tmp_fname = tempnam( NULL, NULL );
|
| 2432 |
|
|
Obj_File_Name = New_Extension( tmp_fname, OBJ_FILE_EXTENSION );
|
| 2433 |
|
|
#else
|
| 2434 |
179 |
syang |
/* Replace source file extension to get object file: */
|
| 2435 |
749 |
hucheng |
Obj_File_Name = New_Extension (fname, OBJ_FILE_EXTENSION);
|
| 2436 |
|
|
#endif
|
| 2437 |
179 |
syang |
}
|
| 2438 |
|
|
|
| 2439 |
|
|
}
|
| 2440 |
|
|
|
| 2441 |
|
|
static void
|
| 2442 |
|
|
Increment_Register_Name (char **name)
|
| 2443 |
|
|
{
|
| 2444 |
|
|
INT i = atoi(*name);
|
| 2445 |
|
|
++i;
|
| 2446 |
|
|
sprintf(*name, "%d", i);
|
| 2447 |
|
|
}
|
| 2448 |
|
|
|
| 2449 |
|
|
static void
|
| 2450 |
|
|
Set_Register_Range_Not_Allocatable (char *regname1, char *regname2)
|
| 2451 |
|
|
{
|
| 2452 |
|
|
char regname[8];
|
| 2453 |
|
|
char *p; // points to first digit in regname
|
| 2454 |
|
|
INT count = 0;
|
| 2455 |
|
|
strcpy(regname,regname1);
|
| 2456 |
|
|
// find where digits start
|
| 2457 |
|
|
for (p = regname; *p && !isdigit(*p); ++p) ;
|
| 2458 |
|
|
FmtAssert( strncmp(regname1, regname2, p - regname) == 0,
|
| 2459 |
|
|
("register range %s-%s doesn't have matching prefixes",
|
| 2460 |
|
|
regname1, regname2));
|
| 2461 |
|
|
|
| 2462 |
|
|
// create each regname in range
|
| 2463 |
|
|
while (strcmp(regname, regname2) != 0) {
|
| 2464 |
|
|
Set_Register_Never_Allocatable (regname);
|
| 2465 |
|
|
Increment_Register_Name (&p);
|
| 2466 |
|
|
++count; if (count > 200) break; // avoid infinite loop
|
| 2467 |
|
|
}
|
| 2468 |
|
|
Set_Register_Never_Allocatable (regname);
|
| 2469 |
|
|
}
|
| 2470 |
|
|
|
| 2471 |
|
|
struct Set_DREG_Not_Allocatable
|
| 2472 |
|
|
{
|
| 2473 |
|
|
inline void operator() (UINT32, ST_ATTR *st_attr) const {
|
| 2474 |
|
|
if (ST_ATTR_kind (*st_attr) != ST_ATTR_DEDICATED_REGISTER)
|
| 2475 |
|
|
return;
|
| 2476 |
|
|
PREG_NUM p = ST_ATTR_reg_id(*st_attr);
|
| 2477 |
|
|
Set_Register_Never_Allocatable(p);
|
| 2478 |
|
|
}
|
| 2479 |
|
|
};
|
| 2480 |
|
|
|
| 2481 |
|
|
// some variables can be pre-allocated to registers,
|
| 2482 |
|
|
// in which case the symtab will be marked,
|
| 2483 |
|
|
// or the command-line may list registers not to be used.
|
| 2484 |
|
|
static void
|
| 2485 |
|
|
Mark_Specified_Registers_As_Not_Allocatable (void)
|
| 2486 |
|
|
{
|
| 2487 |
|
|
OPTION_LIST *ol = Registers_Not_Allocatable;
|
| 2488 |
|
|
char *start;
|
| 2489 |
|
|
char *p;
|
| 2490 |
|
|
char regname[8];
|
| 2491 |
|
|
char regname2[8];
|
| 2492 |
|
|
|
| 2493 |
|
|
// go through global dreg list
|
| 2494 |
|
|
if ( ST_ATTR_Table_Size (GLOBAL_SYMTAB)) {
|
| 2495 |
|
|
For_all (St_Attr_Table, GLOBAL_SYMTAB,
|
| 2496 |
|
|
Set_DREG_Not_Allocatable());
|
| 2497 |
|
|
}
|
| 2498 |
|
|
|
| 2499 |
|
|
// now go through command-line list
|
| 2500 |
|
|
if ( ol == NULL ) return;
|
| 2501 |
|
|
for ( ; ol != NULL; ol = OLIST_next(ol) ) {
|
| 2502 |
|
|
|
| 2503 |
|
|
/* Check for commas and ranges: */
|
| 2504 |
|
|
p = OLIST_val(ol);
|
| 2505 |
|
|
start = p;
|
| 2506 |
|
|
while ( *p != ':' && *p != 0 ) {
|
| 2507 |
|
|
if ( *p == ',') {
|
| 2508 |
|
|
strncpy (regname, start, p-start+1);
|
| 2509 |
|
|
regname[p-start] = '\0';
|
| 2510 |
|
|
Set_Register_Never_Allocatable (regname);
|
| 2511 |
|
|
++p;
|
| 2512 |
|
|
start = p;
|
| 2513 |
|
|
}
|
| 2514 |
|
|
else if (*p == '-' ) {
|
| 2515 |
|
|
strncpy (regname, start, p-start+1);
|
| 2516 |
|
|
regname[p-start] = '\0';
|
| 2517 |
|
|
++p;
|
| 2518 |
|
|
start = p;
|
| 2519 |
|
|
while (*p != ',' && *p != '\0') {
|
| 2520 |
|
|
++p;
|
| 2521 |
|
|
}
|
| 2522 |
|
|
strncpy (regname2, start, p-start+1);
|
| 2523 |
|
|
regname2[p-start] = '\0';
|
| 2524 |
|
|
Set_Register_Range_Not_Allocatable (regname, regname2);
|
| 2525 |
|
|
if (*p == 0) return;
|
| 2526 |
|
|
++p;
|
| 2527 |
|
|
start = p;
|
| 2528 |
|
|
}
|
| 2529 |
|
|
else {
|
| 2530 |
|
|
++p;
|
| 2531 |
|
|
}
|
| 2532 |
|
|
}
|
| 2533 |
|
|
strncpy (regname, start, p-start+1);
|
| 2534 |
|
|
Set_Register_Never_Allocatable (regname);
|
| 2535 |
|
|
}
|
| 2536 |
|
|
}
|
| 2537 |
|
|
|
| 2538 |
749 |
hucheng |
#ifdef KEY
|
| 2539 |
|
|
char ** be_command_line_args = NULL;
|
| 2540 |
|
|
INT be_command_line_argc = 0;
|
| 2541 |
|
|
#endif // KEY
|
| 2542 |
179 |
syang |
|
| 2543 |
|
|
/* ====================================================================
|
| 2544 |
|
|
*
|
| 2545 |
|
|
* main
|
| 2546 |
|
|
*
|
| 2547 |
|
|
* Main entry point and driver for the Code Generator.
|
| 2548 |
|
|
*
|
| 2549 |
|
|
* ====================================================================
|
| 2550 |
|
|
*/
|
| 2551 |
|
|
|
| 2552 |
|
|
void
|
| 2553 |
|
|
CG_Process_Command_Line (INT cg_argc, char **cg_argv, INT be_argc, char **be_argv)
|
| 2554 |
|
|
{
|
| 2555 |
|
|
extern char *Whirl_Revision;
|
| 2556 |
|
|
|
| 2557 |
|
|
if (strcmp (Whirl_Revision, WHIRL_REVISION) != 0)
|
| 2558 |
|
|
FmtAssert (!DEBUG_Ir_Version_Check,
|
| 2559 |
|
|
("WHIRL revision mismatch between be.so (%s) and cg.so (%s)",
|
| 2560 |
|
|
Whirl_Revision, WHIRL_REVISION));
|
| 2561 |
|
|
|
| 2562 |
749 |
hucheng |
#ifdef KEY
|
| 2563 |
|
|
be_command_line_args = be_argv;
|
| 2564 |
|
|
be_command_line_argc = be_argc;
|
| 2565 |
|
|
#endif // KEY
|
| 2566 |
|
|
|
| 2567 |
179 |
syang |
/* Perform preliminary command line processing: */
|
| 2568 |
|
|
Build_Option_String ( be_argc, be_argv );
|
| 2569 |
|
|
Process_Command_Line ( cg_argc, cg_argv );
|
| 2570 |
|
|
|
| 2571 |
|
|
CG_Configure_Opt_Level(Opt_Level);
|
| 2572 |
|
|
|
| 2573 |
749 |
hucheng |
#ifdef TARG_IA64
|
| 2574 |
179 |
syang |
/* Getting the relative skip_list about if_conv, locs etc.*/
|
| 2575 |
|
|
locs_skip_bb = IPFEC_Build_Skiplist(raw_locs_skip_bb);
|
| 2576 |
522 |
syang |
glos_skip_bb = IPFEC_Build_Skiplist(raw_glos_skip_bb);
|
| 2577 |
179 |
syang |
mlbr_skip_bb = IPFEC_Build_Skiplist(raw_mlbr_skip_bb);
|
| 2578 |
|
|
|
| 2579 |
|
|
if_conv_skip_rgn = IPFEC_Build_Skiplist(raw_if_conv_skip_rgn);
|
| 2580 |
|
|
if_conv_skip_area = IPFEC_Build_Skiplist(raw_if_conv_skip_area);
|
| 2581 |
|
|
|
| 2582 |
|
|
glos_skip_rgn = IPFEC_Build_Skiplist(raw_glos_skip_rgn);
|
| 2583 |
|
|
|
| 2584 |
|
|
spec_skip_bb = IPFEC_Build_Skiplist(raw_spec_skip_bb);
|
| 2585 |
|
|
spec_skip_rgn = IPFEC_Build_Skiplist(raw_spec_skip_rgn);
|
| 2586 |
|
|
spec_skip_op = IPFEC_Build_Skiplist(raw_spec_skip_op);
|
| 2587 |
|
|
msched_skip_bb = IPFEC_Build_Skiplist(raw_msched_skip_bb);
|
| 2588 |
|
|
msched_skip_rgn = IPFEC_Build_Skiplist(raw_msched_skip_rgn);
|
| 2589 |
|
|
|
| 2590 |
|
|
spec_skip_PU = IPFEC_Build_Skiplist(raw_spec_skip_PU);
|
| 2591 |
|
|
if_conv_skip_PU = IPFEC_Build_Skiplist(raw_if_conv_skip_PU);
|
| 2592 |
|
|
PRDB_skip_PU = IPFEC_Build_Skiplist(raw_PRDB_skip_PU);
|
| 2593 |
|
|
pre_glos_skip_PU = IPFEC_Build_Skiplist(raw_pre_glos_skip_PU);
|
| 2594 |
|
|
post_locs_skip_PU = IPFEC_Build_Skiplist(raw_post_locs_skip_PU);
|
| 2595 |
|
|
glos_rename_skip_bb = IPFEC_Build_Skiplist(raw_glos_rename_skip_bb);
|
| 2596 |
|
|
glos_rename_skip_op = IPFEC_Build_Skiplist(raw_glos_rename_skip_op);
|
| 2597 |
|
|
latency2 = IPFEC_Build_Skiplist(raw_latency2);
|
| 2598 |
749 |
hucheng |
#endif
|
| 2599 |
179 |
syang |
Prepare_Source ();
|
| 2600 |
|
|
} /* CG_Process_Command_Line */
|
| 2601 |
|
|
|
| 2602 |
|
|
|
| 2603 |
|
|
/* Initialization that needs to be done after the global symtab is read */
|
| 2604 |
|
|
void
|
| 2605 |
|
|
CG_Init (void)
|
| 2606 |
|
|
{
|
| 2607 |
|
|
Set_Error_Phase ( "Codegen Initialization" );
|
| 2608 |
|
|
MEM_POOL_Initialize (&MEM_local_region_pool, "local_region_pool", TRUE /* zero-memory */);
|
| 2609 |
|
|
MEM_POOL_Initialize (&MEM_local_region_nz_pool, "local_region_nz_pool", FALSE /* zero-memory */);
|
| 2610 |
|
|
|
| 2611 |
|
|
REGISTER_Begin(); /* initialize the register package */
|
| 2612 |
|
|
Init_Dedicated_TNs ();
|
| 2613 |
|
|
|
| 2614 |
|
|
Mark_Specified_Registers_As_Not_Allocatable ();
|
| 2615 |
|
|
|
| 2616 |
|
|
EMT_Begin_File ( Argv0, option_string );
|
| 2617 |
|
|
|
| 2618 |
|
|
/* this has to be done after LNO has been loaded to grep
|
| 2619 |
|
|
* prefetch_ahead fromn LNO */
|
| 2620 |
|
|
Configure_prefetch_ahead();
|
| 2621 |
3577 |
leihuang |
#if defined(KEY) && !defined(TARG_SL) && !defined(TARG_NVISA) && !defined(TARG_LOONGSON)
|
| 2622 |
749 |
hucheng |
if (flag_test_coverage || profile_arcs)
|
| 2623 |
3577 |
leihuang |
CG_Init_Gcov();
|
| 2624 |
179 |
syang |
|
| 2625 |
3577 |
leihuang |
if (LOCS_Fwd_Scheduling_set) {
|
| 2626 |
|
|
fprintf(stderr, "warning: -CG:local_fwd_sched is deprecated,"
|
| 2627 |
|
|
" use -CG:local_sched_alg\n");
|
| 2628 |
|
|
if (!LOCS_Scheduling_Algorithm_set) {
|
| 2629 |
|
|
LOCS_Scheduling_Algorithm = LOCS_Fwd_Scheduling ? 1 : 0;
|
| 2630 |
|
|
LOCS_Scheduling_Algorithm_set = TRUE;
|
| 2631 |
|
|
} else {
|
| 2632 |
|
|
fprintf(stderr, "warning: -CG:local_fwd_sched ignored,"
|
| 2633 |
|
|
" conflicts with -CG:local_sched_alg\n");
|
| 2634 |
749 |
hucheng |
}
|
| 2635 |
|
|
}
|
| 2636 |
3577 |
leihuang |
#ifdef TARG_X8664
|
| 2637 |
|
|
if (Is_Target_Orochi()) {
|
| 2638 |
|
|
// TODO: add CG_dispatch_schedule set to TRUE once
|
| 2639 |
|
|
// we have binutils support
|
| 2640 |
|
|
if (CG_loop32 == FALSE)
|
| 2641 |
|
|
CG_loop32 = TRUE;
|
| 2642 |
|
|
}
|
| 2643 |
3591 |
dreachem |
if (Is_Target_Orochi() || Is_Target_Barcelona()) {
|
| 2644 |
|
|
if (CG_interior_ptrs_x86) {
|
| 2645 |
|
|
// Enable sib translation and scheduling for register pressure
|
| 2646 |
|
|
// for unrolled loops.
|
| 2647 |
|
|
CG_merge_counters_x86 = TRUE;
|
| 2648 |
|
|
LOCS_PRE_Enable_Unroll_RegPressure_Sched = TRUE;
|
| 2649 |
3675 |
dreachem |
} else if (CG_opt_level == 3 && CG_merge_counters_x86_set == FALSE) {
|
| 2650 |
|
|
CG_merge_counters_x86 = TRUE;
|
| 2651 |
3591 |
dreachem |
}
|
| 2652 |
|
|
}
|
| 2653 |
3577 |
leihuang |
#endif //TARG_X8664
|
| 2654 |
|
|
#endif // KEY
|
| 2655 |
|
|
} /* CG_Init */
|
| 2656 |
179 |
syang |
|
| 2657 |
749 |
hucheng |
#ifdef KEY
|
| 2658 |
|
|
extern void CG_End_Final();
|
| 2659 |
|
|
#endif
|
| 2660 |
179 |
syang |
/* Terimination routines for cg */
|
| 2661 |
|
|
void
|
| 2662 |
|
|
CG_Fini (void)
|
| 2663 |
|
|
{
|
| 2664 |
3577 |
leihuang |
#if defined(KEY) && !defined(TARG_NVISA) && !defined(TARG_LOONGSON)
|
| 2665 |
749 |
hucheng |
extern BOOL profile_arcs;
|
| 2666 |
|
|
if (profile_arcs)
|
| 2667 |
|
|
CG_End_Final();
|
| 2668 |
|
|
if (flag_test_coverage || profile_arcs)
|
| 2669 |
|
|
CG_End_Gcov();
|
| 2670 |
|
|
#endif
|
| 2671 |
179 |
syang |
/* List global symbols if desired: */
|
| 2672 |
|
|
if ( List_Symbols ) {
|
| 2673 |
|
|
Print_global_symtab (Lst_File);
|
| 2674 |
|
|
}
|
| 2675 |
|
|
|
| 2676 |
|
|
Set_Error_Phase ( "Codegen Emit" );
|
| 2677 |
|
|
/* Finish off the relocatable object file: */
|
| 2678 |
|
|
EMT_End_File();
|
| 2679 |
|
|
MEM_POOL_Delete (&MEM_local_region_pool);
|
| 2680 |
|
|
MEM_POOL_Delete (&MEM_local_region_nz_pool);
|
| 2681 |
|
|
|
| 2682 |
749 |
hucheng |
#ifdef KEY
|
| 2683 |
|
|
// Check to see if the asm file was written correctly. Do this by writing
|
| 2684 |
|
|
// one extra char and checking its status. Bug 11361.
|
| 2685 |
|
|
if (Assembly) {
|
| 2686 |
|
|
int n = fprintf(Asm_File, "\n");
|
| 2687 |
|
|
if (n != 1) {
|
| 2688 |
|
|
ErrMsg(EC_Asm_Write, Asm_File_Name);
|
| 2689 |
|
|
Terminate(1);
|
| 2690 |
|
|
}
|
| 2691 |
|
|
}
|
| 2692 |
|
|
#endif
|
| 2693 |
179 |
syang |
} /* CG_Fini */
|
| 2694 |
|
|
|